Add to ORKGA nine stage PMOS ring oscillator was designed using polysilicon gates for a self-aligning process while another was designed using a standard metal gate process. A comparison of the polysilicon and metal gate PMQS processes was planned to show the reduced gate capacitance of the self-aligning process. This reduced gate capacitance was to be observed by measuring and comparing the propagation delay of each design on the oscilloscope
This Thesis describes the application of high resolution electron beam lithography and dry etching t...
The evaluation of a metal gate PMOS op amp, including verification of the integrated circuit layout ...
Modified fabrication technique for P-channel MOSFET devices eliminates problems involving gate place...
A nine stage PMOS ring oscillator was designed using polysilicon gates for a self-aligning process w...
The design of a five micron, polysilicon gate, CMOS process is discussed. A p-well approach was used...
Self-aligned polysilicon gate technology was applied to double-diffused MOS (DMOS) construction in a...
Abstract-MOSFET's and CMOS ring oscillators with gate oxide thicknesses from 2.58 nm to 5.7 nm ...
This paper presents the development, fabrication, and testing of a new 6” Metal Gate PMOS process. T...
In this paper we present propagation delay models for MCML gates with resistor- or triode-PMOS-based...
The success of the microelectronics industry over more then 30 years is to a large extent based on u...
Metal gate CMOS capacitors were formed using a metal interdiffusion process at RIT. First silicon di...
We report the design and characterization of a circuit technique to measure the on-chip delay of a...
Since 40 years microlectronics has always been evolving following the Moore's Law rhythm thanks to t...
Polycrystalline Si1-xGex (poly Si-Ge) was explored as a process compatible alternative gate material...
CMOS technology has provided an integrated circuit equivalent for the conventional electromechanical...
This Thesis describes the application of high resolution electron beam lithography and dry etching t...
The evaluation of a metal gate PMOS op amp, including verification of the integrated circuit layout ...
Modified fabrication technique for P-channel MOSFET devices eliminates problems involving gate place...
A nine stage PMOS ring oscillator was designed using polysilicon gates for a self-aligning process w...
The design of a five micron, polysilicon gate, CMOS process is discussed. A p-well approach was used...
Self-aligned polysilicon gate technology was applied to double-diffused MOS (DMOS) construction in a...
Abstract-MOSFET's and CMOS ring oscillators with gate oxide thicknesses from 2.58 nm to 5.7 nm ...
This paper presents the development, fabrication, and testing of a new 6” Metal Gate PMOS process. T...
In this paper we present propagation delay models for MCML gates with resistor- or triode-PMOS-based...
The success of the microelectronics industry over more then 30 years is to a large extent based on u...
Metal gate CMOS capacitors were formed using a metal interdiffusion process at RIT. First silicon di...
We report the design and characterization of a circuit technique to measure the on-chip delay of a...
Since 40 years microlectronics has always been evolving following the Moore's Law rhythm thanks to t...
Polycrystalline Si1-xGex (poly Si-Ge) was explored as a process compatible alternative gate material...
CMOS technology has provided an integrated circuit equivalent for the conventional electromechanical...
This Thesis describes the application of high resolution electron beam lithography and dry etching t...
The evaluation of a metal gate PMOS op amp, including verification of the integrated circuit layout ...
Modified fabrication technique for P-channel MOSFET devices eliminates problems involving gate place...