MOS Capacitors were used to determine minority carrier lifetimes by obtaining capacitance vs time data (C-U. A test system, utilizing an IBM PC as the driver for a Princeton Applied Research model 410 C-v plotter, Kiethley programmable power supply, and HP4145 parameter analyzer, was built to obtain the C-t data. The data can then be down-loaded to the VAX mainframe computer and analyzed by various FORTRAN programs, using analytical techniques developed by people such as, Zerbst, Schroder and Guldberg, Heiman, and others
A HIAC/ROYCO particle monitoring system is being installed to monitor aerosols in the RIT clean room...
The redesign and layout of a clocked eight-bit digital to analog converter using emitter coupled log...
An Autosort Mark II wafer flatness tester was installed and initial runs and performance testing acc...
An IBM computer, a HP4145B parametric analyzer, a Micromanipulator 410 capacitance meter, and a Keit...
Minority carrier lifetimes are a useful parameter in both the design and manufacture of discrete and...
The effects of an n-type and p-type doped polysilicon gate fabricated over both an n-type and p-type...
Applying chemical mechanical planarization techniques to form the gate for a Cu/Ti/SiO2/Si capacitor...
A test system was installed at JUT that can automatically test every die on a wafer without any oper...
This project entailed the design, fabrication, and testing of a surface micro-machined electret pres...
A study has been performed to investigate oxynitrides as thin gate dielectrics. The method of nitrid...
SUPREM simulations were run to determine a junction depth of 3um and a sheet resistance of approxima...
The work function of p-type and n-type metal electrode materials deposited by RF magnetron sputterin...
The effect of surface cleaning and passivation techniques on the reverse bias saturation current Jo ...
Hot electron injection was investigated using the HP 4145B SPA to induce Fewler- Nordheim tunneling....
Resonant Interband Tunnel Diodes (RITD) with device sizes ranging from r=20μm to r=50nm (mask define...
A HIAC/ROYCO particle monitoring system is being installed to monitor aerosols in the RIT clean room...
The redesign and layout of a clocked eight-bit digital to analog converter using emitter coupled log...
An Autosort Mark II wafer flatness tester was installed and initial runs and performance testing acc...
An IBM computer, a HP4145B parametric analyzer, a Micromanipulator 410 capacitance meter, and a Keit...
Minority carrier lifetimes are a useful parameter in both the design and manufacture of discrete and...
The effects of an n-type and p-type doped polysilicon gate fabricated over both an n-type and p-type...
Applying chemical mechanical planarization techniques to form the gate for a Cu/Ti/SiO2/Si capacitor...
A test system was installed at JUT that can automatically test every die on a wafer without any oper...
This project entailed the design, fabrication, and testing of a surface micro-machined electret pres...
A study has been performed to investigate oxynitrides as thin gate dielectrics. The method of nitrid...
SUPREM simulations were run to determine a junction depth of 3um and a sheet resistance of approxima...
The work function of p-type and n-type metal electrode materials deposited by RF magnetron sputterin...
The effect of surface cleaning and passivation techniques on the reverse bias saturation current Jo ...
Hot electron injection was investigated using the HP 4145B SPA to induce Fewler- Nordheim tunneling....
Resonant Interband Tunnel Diodes (RITD) with device sizes ranging from r=20μm to r=50nm (mask define...
A HIAC/ROYCO particle monitoring system is being installed to monitor aerosols in the RIT clean room...
The redesign and layout of a clocked eight-bit digital to analog converter using emitter coupled log...
An Autosort Mark II wafer flatness tester was installed and initial runs and performance testing acc...