Metal-gate CMOS (Complimentary Metal Oxide Semiconductors) devices were designed, fabricated and tested. The design was actually a simplified test chip, with diffused resistors, individual NMOS and PMOS transistors, and various gates (inverter,NOR,NAND,etc). The fabrication took place with the use of a p-type well in order to fabricate both types of transistors on the same n-type substrate. Testing yielded only working resistors, as difficulties in the metal 1 ization step of fabrication caused the thickness of the gate oxide to reduce significantly enough to cause a direct short between the drain and source regions of both transistor types. This did not allow for a direct determination of necessary future Ion implantation correction doses,...
The purpose of this paper is to describe the design and the process used to fabricate NMOS devices. ...
textAggressive scaling required to augment device performance has caused conventional electrode mate...
The motivation in creation of the Strongarm process flow was to create a robust “enabling” process t...
Our study involves the design, fabrication, and characterization of basic nMOS digital logic gates, ...
The development and implementation of a metal gate technology (alloy, compound, or silicide) into me...
The design of a five micron, polysilicon gate, CMOS process is discussed. A p-well approach was used...
The insulated-gate field-effect transistor was conceived in the 1930s by Lilienfeld and Heil. An ins...
This project was an investigation into transistor development in areas of implanted wells and source...
Gate leakage has complicated the layout and measurement of C-V test structures. In this paper the im...
In this paper, we report the fabrication of the tip-on-gate of a field-effect-transistor (ToGoFET) p...
[[abstract]]The UMOS field effect transistor or UMOSFET is a form of vertical or “trench” style stru...
A method to prepare metal-insulator-metal field-effect transistor (TFTs) is reported. The study fabr...
Partially scaled 0.5 Mym NMOS and PMOS test devices have been fabricated using synchroton radiation ...
In this investigation, efforts have been made to move the Microelectronic Engineering Program at Roc...
Metal gate CMOS capacitors were formed using a metal interdiffusion process at RIT. First silicon di...
The purpose of this paper is to describe the design and the process used to fabricate NMOS devices. ...
textAggressive scaling required to augment device performance has caused conventional electrode mate...
The motivation in creation of the Strongarm process flow was to create a robust “enabling” process t...
Our study involves the design, fabrication, and characterization of basic nMOS digital logic gates, ...
The development and implementation of a metal gate technology (alloy, compound, or silicide) into me...
The design of a five micron, polysilicon gate, CMOS process is discussed. A p-well approach was used...
The insulated-gate field-effect transistor was conceived in the 1930s by Lilienfeld and Heil. An ins...
This project was an investigation into transistor development in areas of implanted wells and source...
Gate leakage has complicated the layout and measurement of C-V test structures. In this paper the im...
In this paper, we report the fabrication of the tip-on-gate of a field-effect-transistor (ToGoFET) p...
[[abstract]]The UMOS field effect transistor or UMOSFET is a form of vertical or “trench” style stru...
A method to prepare metal-insulator-metal field-effect transistor (TFTs) is reported. The study fabr...
Partially scaled 0.5 Mym NMOS and PMOS test devices have been fabricated using synchroton radiation ...
In this investigation, efforts have been made to move the Microelectronic Engineering Program at Roc...
Metal gate CMOS capacitors were formed using a metal interdiffusion process at RIT. First silicon di...
The purpose of this paper is to describe the design and the process used to fabricate NMOS devices. ...
textAggressive scaling required to augment device performance has caused conventional electrode mate...
The motivation in creation of the Strongarm process flow was to create a robust “enabling” process t...