Of the many facets of integrated circuit fabrication, photolithography may very well be the most important due to the number of levels required for the fabrication of sophisticated devices. Therefore it is imperative to understand the performance capabilities of an exposure tool and identify its inherent limitations. Many methods have been developed which concentrate specifically on evaluating resolution, critical dimensions or registration. Often test patterns exist which vary widely for applications with respect to steppers, IX scanning projection aligners and other IX exposure equipment. The following work is focused on the requirements of evaluating and optimizing all aspects of performance for various exposure tools with one basic desi...
This project developed a test chip designed to standardize the testing requirements and characterize...
This project involved the definition of the steps necessary to generate a mask or reticle for any of...
Three different architectures were compared as candidates for EUV lithography masks. Binary masks we...
Of the many facets of integrated circuit fabrication, photolithography may very well be the most imp...
Photolithographers, especially those responsible for exposure tools, will learn that the following w...
This project involved the simulation and analysis of critical dimensions (CD) using the RIT Canon 20...
In order to confidently reproduce results obtained from experimentation or standard processing, the ...
Existing photomask metrology is struggling to keep pace with the rapid reduction of IC dimensions as...
This paper presents results from the use of electrical measurements to investigate dimensional misma...
This paper presents results from the use of electrical measurements to investigate dimensional misma...
This paper presents results from the use of electrical measurements to investigate dimensional misma...
This paper presents results from the use of electrical measurements to investigate dimensional misma...
Existing photomask metrology is struggling to keep pace with the rapid reduction of IC dimensions a...
Recently, the design of integrated circuits has become more and more complicated due to higher circu...
In the photolithographic process, critical dimensions (CD) of exposed features in photoresist need t...
This project developed a test chip designed to standardize the testing requirements and characterize...
This project involved the definition of the steps necessary to generate a mask or reticle for any of...
Three different architectures were compared as candidates for EUV lithography masks. Binary masks we...
Of the many facets of integrated circuit fabrication, photolithography may very well be the most imp...
Photolithographers, especially those responsible for exposure tools, will learn that the following w...
This project involved the simulation and analysis of critical dimensions (CD) using the RIT Canon 20...
In order to confidently reproduce results obtained from experimentation or standard processing, the ...
Existing photomask metrology is struggling to keep pace with the rapid reduction of IC dimensions as...
This paper presents results from the use of electrical measurements to investigate dimensional misma...
This paper presents results from the use of electrical measurements to investigate dimensional misma...
This paper presents results from the use of electrical measurements to investigate dimensional misma...
This paper presents results from the use of electrical measurements to investigate dimensional misma...
Existing photomask metrology is struggling to keep pace with the rapid reduction of IC dimensions a...
Recently, the design of integrated circuits has become more and more complicated due to higher circu...
In the photolithographic process, critical dimensions (CD) of exposed features in photoresist need t...
This project developed a test chip designed to standardize the testing requirements and characterize...
This project involved the definition of the steps necessary to generate a mask or reticle for any of...
Three different architectures were compared as candidates for EUV lithography masks. Binary masks we...