The VMM3a is a custom Application Specific Integrated Circuit (ASIC). It will be used as the front ASIC for both Micromegas and sTGC detectors of the ATLAS Muon New Small Wheels upgrade at CERN. Due to its highly configurable parameters, it has been proposed a variety of tracking detectors and another experiments. It is fabricated in the 130nm Global Foundries 8RF-DM process. The ASIC integrates 64 independently configurable channels each providing amplitude and timing measurements, in digital or analog format. The design aspects and performance of the VMM3a as a production ASIC will be presented
The New Small Wheel Upgrade of the ATLAS experiment at CERN, planned to take place at 2020, requires...
A series of upgrades are planned for the LHC accelerator to increase its instantaneous luminosity to...
The ATLAS experiment will be upgraded during the next LHC Long Shutdown (LS2). The flagship upgrade ...
The VMM3a is a System on Chip (SoC) custom Application Specific Integrated Circuit (ASIC). It is the...
The VMM is a custom Application Specific Integrated Circuit (ASIC) that can be used in a variety of ...
The VMM is a custom Application Specific Integrated Circuit (ASIC) that can be used in a variety of ...
The VMM is a custom Application Specific Integrated Circuit (ASIC). It will be used in the front- en...
The VMM is a custom Application Specific Integrated Circuit (ASIC) which was designed to be used in t...
The VMM3a is an Application Specific Integrated Circuit (ASIC) developed by the Brookhaven National ...
The Scalable Readout System (SRS) developed by the RD51 collaboration is a versatile and multi-purpo...
The small-strip Thin-Gap Chambers (sTGC) will be used as both trigger and precision tracking muon de...
The small-strip Thin-Gap Chambers (sTGC) will be used as both trigger and precision tracking muon de...
This research project was conducted in the RD51 collaboration at CERN, which is involved in the deve...
The ART Data Driver Card (ADDC) will be used in the ATLAS muon upgrade to process and transmit the A...
The High Luminosity Large Hadron Collider (HL-LHC), a planned upgrade of the LHC for 2025, will prov...
The New Small Wheel Upgrade of the ATLAS experiment at CERN, planned to take place at 2020, requires...
A series of upgrades are planned for the LHC accelerator to increase its instantaneous luminosity to...
The ATLAS experiment will be upgraded during the next LHC Long Shutdown (LS2). The flagship upgrade ...
The VMM3a is a System on Chip (SoC) custom Application Specific Integrated Circuit (ASIC). It is the...
The VMM is a custom Application Specific Integrated Circuit (ASIC) that can be used in a variety of ...
The VMM is a custom Application Specific Integrated Circuit (ASIC) that can be used in a variety of ...
The VMM is a custom Application Specific Integrated Circuit (ASIC). It will be used in the front- en...
The VMM is a custom Application Specific Integrated Circuit (ASIC) which was designed to be used in t...
The VMM3a is an Application Specific Integrated Circuit (ASIC) developed by the Brookhaven National ...
The Scalable Readout System (SRS) developed by the RD51 collaboration is a versatile and multi-purpo...
The small-strip Thin-Gap Chambers (sTGC) will be used as both trigger and precision tracking muon de...
The small-strip Thin-Gap Chambers (sTGC) will be used as both trigger and precision tracking muon de...
This research project was conducted in the RD51 collaboration at CERN, which is involved in the deve...
The ART Data Driver Card (ADDC) will be used in the ATLAS muon upgrade to process and transmit the A...
The High Luminosity Large Hadron Collider (HL-LHC), a planned upgrade of the LHC for 2025, will prov...
The New Small Wheel Upgrade of the ATLAS experiment at CERN, planned to take place at 2020, requires...
A series of upgrades are planned for the LHC accelerator to increase its instantaneous luminosity to...
The ATLAS experiment will be upgraded during the next LHC Long Shutdown (LS2). The flagship upgrade ...