High-resolution pulse generator based on a fully programmable Digital-to-Time Converter (DTC) IP-Core

A novel high-performance Digital-to-Time Converter (DTC) organized as an IP-Core (DTC-IP), compatible with 28-nm 7-Series Xilinx Field Programmable Gate Arrays (FPGAs) and System-on-Chips (SoCs) is introduced.The system is suited for generating in parallel multiple digital waveforms that are characterized by programmable pulse width (duty-cycle) and relative delay with resolution at ps level.The proposed DTC IP-Core (DTC-IP) is completely adjustable in terms of minimum and maximum pulse width and delay, i.e. resolution and full-scale range.The user can also set the maximum number of parallel digital waveforms available at the output that corresponds to the number of channels