We present high-speed implementations of the post-quantum supersingular isogeny Diffie-Hellman key exchange (SIDH) and the supersingular isogeny key encapsulation (SIKE) protocols for 32-bit ARMv7-A processors with NEON support. The high performance of our implementations is mainly due to carefully optimized multiprecision and modular arithmetic that finely integrates both ARM and NEON instructions in order to reduce the number of pipeline stalls and memory accesses, and a new Montgomery reduction technique that combines the use of the UMAAL instruction with a variant of the hybrid-scanning approach. In addition, we present efficient implementations of SIDH and SIKE for 64-bit ARMv8-A processors, based on a high-speed Montgomery multiplicat...
This thesis focuses on issues arising when implementing cryptography, specifically performance, side...
To the best of our knowledge, we present the first hardware implementation of isogeny-based cryptogr...
To the best of our knowledge, we present the first hardware implementation of isogeny-based cryptogr...
We present high-speed implementations of the post-quantum supersingular isogeny Diffie-Hellman key e...
We investigate the efficiency of implementing the Jao and De Feo isogeny-based post-quantum key exch...
We investigate the efficiency of implementing the Jao and De Feo isogeny-based post-quantum key exch...
This work investigates the efficiency of implementing the isogeny-based post-quantum key exchange pr...
This work investigates the efficiency of implementing the isogeny-based post-quantum key exchange pr...
Since its introduction by Jao and De Feo in 2011, the supersingular isogeny Diffie-Hellman (SIDH) ke...
In this paper, we present a constant-time hardware implementation that achieves new speed records fo...
In this paper, we present a constant-time hardware implementation that achieves new speed records fo...
In this paper, we present a constant-time hardware implementation that achieves new speed records fo...
We present efficient and compact hardware/software co-design implementations of the Supersingular Is...
Thanks to relatively small public and secret keys, the Supersingular Isogeny Key Encapsulation (SIKE...
New primes were proposed for Supersingular Isogeny Key Encapsulation (SIKE) in NIST standardization ...
This thesis focuses on issues arising when implementing cryptography, specifically performance, side...
To the best of our knowledge, we present the first hardware implementation of isogeny-based cryptogr...
To the best of our knowledge, we present the first hardware implementation of isogeny-based cryptogr...
We present high-speed implementations of the post-quantum supersingular isogeny Diffie-Hellman key e...
We investigate the efficiency of implementing the Jao and De Feo isogeny-based post-quantum key exch...
We investigate the efficiency of implementing the Jao and De Feo isogeny-based post-quantum key exch...
This work investigates the efficiency of implementing the isogeny-based post-quantum key exchange pr...
This work investigates the efficiency of implementing the isogeny-based post-quantum key exchange pr...
Since its introduction by Jao and De Feo in 2011, the supersingular isogeny Diffie-Hellman (SIDH) ke...
In this paper, we present a constant-time hardware implementation that achieves new speed records fo...
In this paper, we present a constant-time hardware implementation that achieves new speed records fo...
In this paper, we present a constant-time hardware implementation that achieves new speed records fo...
We present efficient and compact hardware/software co-design implementations of the Supersingular Is...
Thanks to relatively small public and secret keys, the Supersingular Isogeny Key Encapsulation (SIKE...
New primes were proposed for Supersingular Isogeny Key Encapsulation (SIKE) in NIST standardization ...
This thesis focuses on issues arising when implementing cryptography, specifically performance, side...
To the best of our knowledge, we present the first hardware implementation of isogeny-based cryptogr...
To the best of our knowledge, we present the first hardware implementation of isogeny-based cryptogr...