Minimization and generation of next-state expressions for asynchronous sequential circuits

One step in the synthesis procedure for realizing an asynchronous sequential circuit that is operating in fundamental mode is to obtain an internal-state assignment that will realize the operations of the circuit. Often the procedures that are used in accomplishing the above task generate several satisfactory assignments. The first part of this paper presents a method that will enable one to predict which of the internal-state assignments will yield a simpler set of next-state expressions. A second topic treated in this paper is one of presenting a method to generate the next-state expressions for an asynchronous sequential circuit directly from the internal-state assignment. An algorithm is presented for generating the next-state expressions without construction of the transition table --Abstract, page ii