One step in the synthesis of asynchronous sequential circuits is the construction of a flow table. This paper discusses the requirements of a computer program to allow on-line generation of flow tables for asynchronous sequential circuits. Such topics as the form of the data entered into the program, the type of terminal required, the routines necessary for the designer to enter and correct data, and the internal data structure are discussed. An algorithm for the generation of these flow tables is also presented --Abstract, page ii
Abstract-An asynchronous unit delay is an n input n output of the input n-tuple prior to the last in...
technical reportA methodology for high-level synthesis and performance optimization of asynchronous ...
A new basic VLSI circuit element is presented that can be used to realize pulse mode asynchronous se...
This paper presents a system for specifying the behavior of asynchronous sequential circuits. The sy...
One step in the synthesis procedure for realizing an asynchronous sequential circuit that is operati...
A systematic, asynchronous design method based on a flow diagram is shown. The realizat...
Many well-known synthesis procedures for asynchronous sequential circuits produce minimal or near-mi...
Contains reports on two research projects.Lincoln Laboratory, Purchase Order DDL-B158Department of t...
This paper describes the known methods of generating next-state equations for asynchronous sequentia...
Some techniques are presented to permit the implementation of asynchronous sequential circuits using...
An important step in the synthesis procedure for realizing a normal fundamental mode asynchronous se...
A computer aided design (CAD) tool for the design of very large scale integration (VLSI) synchronous...
Journal ArticleRecent practical advances in asynchronous circuit and system design have resulted in ...
An asynchronous unit delay is an n-input n-output sequential circuit in which the present value of t...
There is a lack of procedures that can be used to find good internal state assignments for asynchron...
Abstract-An asynchronous unit delay is an n input n output of the input n-tuple prior to the last in...
technical reportA methodology for high-level synthesis and performance optimization of asynchronous ...
A new basic VLSI circuit element is presented that can be used to realize pulse mode asynchronous se...
This paper presents a system for specifying the behavior of asynchronous sequential circuits. The sy...
One step in the synthesis procedure for realizing an asynchronous sequential circuit that is operati...
A systematic, asynchronous design method based on a flow diagram is shown. The realizat...
Many well-known synthesis procedures for asynchronous sequential circuits produce minimal or near-mi...
Contains reports on two research projects.Lincoln Laboratory, Purchase Order DDL-B158Department of t...
This paper describes the known methods of generating next-state equations for asynchronous sequentia...
Some techniques are presented to permit the implementation of asynchronous sequential circuits using...
An important step in the synthesis procedure for realizing a normal fundamental mode asynchronous se...
A computer aided design (CAD) tool for the design of very large scale integration (VLSI) synchronous...
Journal ArticleRecent practical advances in asynchronous circuit and system design have resulted in ...
An asynchronous unit delay is an n-input n-output sequential circuit in which the present value of t...
There is a lack of procedures that can be used to find good internal state assignments for asynchron...
Abstract-An asynchronous unit delay is an n input n output of the input n-tuple prior to the last in...
technical reportA methodology for high-level synthesis and performance optimization of asynchronous ...
A new basic VLSI circuit element is presented that can be used to realize pulse mode asynchronous se...