Signal vias are commonly used in multilayer printed circuit board (PCB) design. For a signal via transitioning through the internal power and ground planes, the return current has to jump from one reference plane to another reference plane. The discontinuity of the return current at the via excites the power and ground planes, and results in power bus noise, and can produce an EMI problem as well. Numerical methods, such as finite-difference time-domain (FDTD), moment methods (MoM), and partial element equivalent circuit (PEEC), were employed herein to study this problem. The modeled results were supported by the measurements. In addition, the EMI mitigation approach of adding decoupling capacitors was investigated with the FDTD method
Parasitic inductance in printed circuit board (PCB) geometries can detrimentally impact the electrom...
The effect on EMI of stitching multiple ground planes together along the periphery of multi-layer PC...
Guidelines for the selection and placement of decoupling capacitors that work well for one-sided or ...
Noise on a dc power-bus that results from device switching, as well as other potential mechanisms, i...
Stacked-card and modules-on-backplane printed circuit-board geometries are advantageous for conservi...
DC power bus decoupling of a multi-layer PCB is modeled by a combination of a lumped circuit model a...
EMI associated with inter-board connection was studied through common-mode current measurements and ...
Noise on the DC power-bus attributed to device switching is among the primary sources of EMI and sig...
Due to the increase in board density, routing traces on different layers becomes a widely used strat...
Local decoupling, i.e., placing decoupling capacitors sufficiently close to device power/ground pins...
DC power-bus modeling in high-speed digital design using the finite-difference time-domain (FDTD) me...
Differential and common-mode transfer impedances are proposed herein to analyze noise coupled to (fr...
DC power-bus modeling in high-speed digital design using the finite-difference time-domain (FDTD) me...
DC power-bus modeling in high-speed digital design using the finite-difference time-domain (FDTD) me...
A time domain approach to investigate and predict impedances and scattering parameters of a DC power...
Parasitic inductance in printed circuit board (PCB) geometries can detrimentally impact the electrom...
The effect on EMI of stitching multiple ground planes together along the periphery of multi-layer PC...
Guidelines for the selection and placement of decoupling capacitors that work well for one-sided or ...
Noise on a dc power-bus that results from device switching, as well as other potential mechanisms, i...
Stacked-card and modules-on-backplane printed circuit-board geometries are advantageous for conservi...
DC power bus decoupling of a multi-layer PCB is modeled by a combination of a lumped circuit model a...
EMI associated with inter-board connection was studied through common-mode current measurements and ...
Noise on the DC power-bus attributed to device switching is among the primary sources of EMI and sig...
Due to the increase in board density, routing traces on different layers becomes a widely used strat...
Local decoupling, i.e., placing decoupling capacitors sufficiently close to device power/ground pins...
DC power-bus modeling in high-speed digital design using the finite-difference time-domain (FDTD) me...
Differential and common-mode transfer impedances are proposed herein to analyze noise coupled to (fr...
DC power-bus modeling in high-speed digital design using the finite-difference time-domain (FDTD) me...
DC power-bus modeling in high-speed digital design using the finite-difference time-domain (FDTD) me...
A time domain approach to investigate and predict impedances and scattering parameters of a DC power...
Parasitic inductance in printed circuit board (PCB) geometries can detrimentally impact the electrom...
The effect on EMI of stitching multiple ground planes together along the periphery of multi-layer PC...
Guidelines for the selection and placement of decoupling capacitors that work well for one-sided or ...