Comparison of Binary and Multi-level Logic Electronics for Embedded Systems

Embedded systems are dependent on low-power, miniaturized instrumentation. Comparator circuits are common elements in applications for digital threshold detection. Target applications are dedicated control devices, sensor nodes, etc. in which hardware constraints may be most critical. Comparator circuits are selected to compare binary and multi-level logic implementations. A multi-level, memory-based logic approach is in development that offers potential benefits in power usage and size with respect to traditional binary logic systems. A multi-level digital system can reduce interconnect lines and processing components if implementation issues can be overcome. The multi-level, memory-based logic approach uses mature CMOS technology, but the transistors are used for multi-level operations and memory manipulation. Circuit layouts of quaternary and binary comparators are presented to compare the approaches. In particular, power characteristics and transistor count are examined. The potential for improved embedded systems based on the multi-level, memory-based logic is discussed