Crack propagation in micro-chevron-test samples of direct bonded silicon-silicon wafers

Wafer bonding describes all technologies for joining two or more substrates directly or using certain intermediate layers. Current investigations are focused on so-called low temperature bonding as a special direct bonding technology. It is carried out without intermediate layers and at temperatures below 400 °C. In addition to the wafer materials, the toughness of the bonded interface also depends on the bonding process itself. It can vary for different pre-treatments. Furthermore, an increase of the annealing temperature leads to a higher toughness of the bonded interface. The fracture toughness is a suitable value to describe the damage behaviour of the bonded interface. Based on a micro-chevron-specimen, the fracture toughness can be determined either numerically or by combining numerical analysis with experimental measurement of the maximum force. The maximum force is measured during a micro-chevron-test using a Mode I loading. The minimum of the stress intensity coefficient can be determined by a FE-simulation only. One possibility to estimate the stress intensity coefficient is the compliance method. The compliance of the whole specimen increases with a growing crack. The stress intensity coefficient can be directly derived from the simulated compliance and the crack length itself. The paper is focused on the micro-chevron-test for direct bonded silicon-silicon wafers. Additional to the estimation of dimensionless stress intensity coefficient as a function of geometry, the influence of different pre-treatments and annealing temperatures on the measured maximum force are analysed and discussed