LOW POWER COMPRESSOR BASED MAC ARCHITECTURE FOR DSP APPLICATIONS

This paper shows the low power blower based Multiply-Accumulate (MAC) design for DSP applications. In VLSI, exceptionally registered math cells including adders and multipliers are the most plentifully utilized parts. Productive usage of math rationale units, skimming point units and other devoted utilitarian segments are used in the vast majority of the chip and computerized flag processors (DSPs). Along these lines in this concise, blower circuit has been outlined for the low power applications and furthermore the effect of datapath circuits has been illustrated. The proposed low power blower design was connected to MAC unit and looked at against the regular blower based MAC units and watched that the proposed engineering has decreased critical measure of spillage control