RESOLVING THE BIAS POINT FOR WIDE RANGE OF TEMPERATURE APPLICATIONS IN HIGH-K/METAL GATE NANOSCALE DG-MOSFET

This article investigates the Zero-Temperature-Coefficient (ZTC) bias point and its associated performance metrics of a High-k Metal Gate (HKMG) DG-MOSFET in nanoscale. The ZTC bias point is defined as the point at which the device parameters are independent of temperature. The discussion includes sub threshold slope (SS), drain induced barrier lowering (DIBL), on-off current ratio (Ion/Ioff), transconductance (gm), output conductance (gd) and intrinsic gain (AV). From the results, it is confirmed that there are two different ZTC bias points, one for IDS (ZTCIDS) and the other for gm (ZTCgm). The points are obtained as: ZTCIDS=0.552 V and ZTCgm =0.410 V, which will open important opportunities in analog circuit design for wide range of temperature applications