This output is the culmination of over 10 years work on radix digit-serial computations. This research was recognized with an invitation to the Editorial Board of the IEEE Transactions on VLSI Systems. The work on digit serial computations was adopted by Professor Parhi’s Group at Minnesota University (parhi@umn.edu ) and as a result many companies are developing crypto-processors based on digital serial computations including Philips and Sun Microsystems
A novel approach is presented for complex numbers in full fractional two's complement representation...
up the execution of very-large word-length repetitive multiplications found in applications like pub...
Abstract. T his paper presents two low-energy, highly regular, VLSI architectures performing a large...
All serial–serial multiplication structures previously reported in the literature have been confine...
(eng) We design a new radix 2 (i.e., serial, most significant digit first) floating-point divider wh...
Two new high-performance bidirectional mixed radix-2n serial-serial multipliers are presented. The n...
[[abstract]]© 1998 Institute of Electrical and Electronics Engineers - In this paper, a novel digit-...
[[abstract]]© 1998 Institute of Electrical and Electronics Engineers - In this paper, a novel digit-...
In this paper, we introduce a novel high-radix binary signed digit (BSD) serial-parallel multiplier ...
In this paper we deal with a new high precision computation of the dot product. The key idea is to u...
The method 2n + 1 multiplier is the congestion of a wide drift of applications from silt collection ...
Traditional Serial-Serial multiplier addresses the high data sampling rate. It is effectively consid...
ISBN: 0818689633International audienceThe authors deal with the detailed VLSI implementation of a fa...
A low latency digit serial multiplier for GF(2m) that can be pipelined to the bit-level is presented...
Multiplication in finite fields (Galois fields) is a basic operation for cryptography applications. ...
A novel approach is presented for complex numbers in full fractional two's complement representation...
up the execution of very-large word-length repetitive multiplications found in applications like pub...
Abstract. T his paper presents two low-energy, highly regular, VLSI architectures performing a large...
All serial–serial multiplication structures previously reported in the literature have been confine...
(eng) We design a new radix 2 (i.e., serial, most significant digit first) floating-point divider wh...
Two new high-performance bidirectional mixed radix-2n serial-serial multipliers are presented. The n...
[[abstract]]© 1998 Institute of Electrical and Electronics Engineers - In this paper, a novel digit-...
[[abstract]]© 1998 Institute of Electrical and Electronics Engineers - In this paper, a novel digit-...
In this paper, we introduce a novel high-radix binary signed digit (BSD) serial-parallel multiplier ...
In this paper we deal with a new high precision computation of the dot product. The key idea is to u...
The method 2n + 1 multiplier is the congestion of a wide drift of applications from silt collection ...
Traditional Serial-Serial multiplier addresses the high data sampling rate. It is effectively consid...
ISBN: 0818689633International audienceThe authors deal with the detailed VLSI implementation of a fa...
A low latency digit serial multiplier for GF(2m) that can be pipelined to the bit-level is presented...
Multiplication in finite fields (Galois fields) is a basic operation for cryptography applications. ...
A novel approach is presented for complex numbers in full fractional two's complement representation...
up the execution of very-large word-length repetitive multiplications found in applications like pub...
Abstract. T his paper presents two low-energy, highly regular, VLSI architectures performing a large...