There is a large body of legacy scientific code in use today that could benefit from execution on accelerator devices like GPUs and FPGAs. Manual translation of such legacy code into device-specific parallel code requires significant manual effort and is a major obstacle to wider FPGA adoption. We are developing an automated optimizing compiler TyTra to overcome this obstacle. The TyTra flow aims to compile legacy Fortran code automatically for FPGA-based acceleration, while applying suitable optimizations. We present the flow with a focus on two key optimizations, automatic pipelining and vectorization. Our compiler frontend extracts patterns from legacy Fortran code that can be pipelined and vectorized. The backend first creates fine and ...
Numerical simulations can help solve complex problems. Most of these algorithms are massively parall...
Heterogeneous High-Performance Computing (HPC) platforms present a significant programming challeng...
The problem of automatically generating hardware modules from high level application representations...
There is a large body of legacy scientific code in use today that could benefit from execution on ac...
High-performance computing on heterogeneous platforms in general and those with FPGAs in particular ...
Many numerical simulation applications from the scientific, financial and machine-learning domains r...
The demand for scalable, high-performance computing has increased as the size of datasets has grown ...
We present preliminary results with the TyTra design flow. Our aim is to create a parallelising comp...
Hardware accelerators, such as fpga boards or gpu, are an interesting alternative or a valuable comp...
In this paper we present a novel approach to program optimisation based on compiler-based type-drive...
Field Programmable Gate Arrays promise to deliver superior energy efficiency in heterogeneous high p...
The demand for high-performance computing has been growing significantly in the past decade. The bot...
Massively parallel accelerators such as GPGPUs, manycores and FPGAs represent a powerful and afforda...
This dissertation focuses on efficient generation of custom processors from high-level language desc...
This contribution presents the performance modeling of a super desktop with GPU and FPGA accelerator...
Numerical simulations can help solve complex problems. Most of these algorithms are massively parall...
Heterogeneous High-Performance Computing (HPC) platforms present a significant programming challeng...
The problem of automatically generating hardware modules from high level application representations...
There is a large body of legacy scientific code in use today that could benefit from execution on ac...
High-performance computing on heterogeneous platforms in general and those with FPGAs in particular ...
Many numerical simulation applications from the scientific, financial and machine-learning domains r...
The demand for scalable, high-performance computing has increased as the size of datasets has grown ...
We present preliminary results with the TyTra design flow. Our aim is to create a parallelising comp...
Hardware accelerators, such as fpga boards or gpu, are an interesting alternative or a valuable comp...
In this paper we present a novel approach to program optimisation based on compiler-based type-drive...
Field Programmable Gate Arrays promise to deliver superior energy efficiency in heterogeneous high p...
The demand for high-performance computing has been growing significantly in the past decade. The bot...
Massively parallel accelerators such as GPGPUs, manycores and FPGAs represent a powerful and afforda...
This dissertation focuses on efficient generation of custom processors from high-level language desc...
This contribution presents the performance modeling of a super desktop with GPU and FPGA accelerator...
Numerical simulations can help solve complex problems. Most of these algorithms are massively parall...
Heterogeneous High-Performance Computing (HPC) platforms present a significant programming challeng...
The problem of automatically generating hardware modules from high level application representations...