<p>In this paper we present quaternary and ternary routing tracks for FPGAs, and their implementation in 28nm FDSOI technology. We discuss the transistor level design of multi-valued repeaters, multiplexers and translators, and specific features of FDSOI technology which make it possible. Next we compare the multi-valued routing architectures with equivalent single driver two-valued routing architectures. We show that for long tracks, it is possible to achieve upto 3x reduction in dynamic switching energy, upto 2x reduction in routing wire area and 10% reduction in area dedicated to routing resources. The multi-valued tracks are slightly more susceptible to process variation. We present a layout method for multivalued standard cells and det...
Abstract—Motivated by the goal of increasing the performance of FPGA-based designs, we propose new S...
This thesis looks at Network-on-Chip design for FPGAs beyond the trade-offs between hard (silicon) a...
Abstract: Studying the architectural evolution of mainstream field programmable gate arrays (FPGAs) ...
A Field-Programmable Gate Array (FPGA) is a (re)programmable logic device that implements multi-leve...
Abstract:- In this work, we investigate the effect of serialization on the implementation area of da...
In this work we investigate the routing architecture of FPGAs, focusing primarily on determining the...
The routing architecture of an FPGA consists of the length of the wires, the type of switch used to ...
Multi-FPGA systems (MFSs) are used as custom computing machines, logic emulators and rapid prototypi...
National audienceIn the context of the FPGA resource limitation for large scale NoC, multi-FPGA base...
This paper describes a new detailed routing algorithm that has been designed specifically for the ty...
Routing resources in modern FPGAs use 50% of the silicon real estate and are significant contributor...
Field-Programmable Gate Arrays (FPGAs) are integrated circuits which can be programmed to implement...
International audienceIn multi-FPGA prototyping systems for circuit verification, serialized time-mu...
This paper studies an architectural issue concerning field programmable gate arrays (FPGAs). The obs...
Abstract—As the logic capacity of field-programmable gate arrays (FPGAs) increases, they are increas...
Abstract—Motivated by the goal of increasing the performance of FPGA-based designs, we propose new S...
This thesis looks at Network-on-Chip design for FPGAs beyond the trade-offs between hard (silicon) a...
Abstract: Studying the architectural evolution of mainstream field programmable gate arrays (FPGAs) ...
A Field-Programmable Gate Array (FPGA) is a (re)programmable logic device that implements multi-leve...
Abstract:- In this work, we investigate the effect of serialization on the implementation area of da...
In this work we investigate the routing architecture of FPGAs, focusing primarily on determining the...
The routing architecture of an FPGA consists of the length of the wires, the type of switch used to ...
Multi-FPGA systems (MFSs) are used as custom computing machines, logic emulators and rapid prototypi...
National audienceIn the context of the FPGA resource limitation for large scale NoC, multi-FPGA base...
This paper describes a new detailed routing algorithm that has been designed specifically for the ty...
Routing resources in modern FPGAs use 50% of the silicon real estate and are significant contributor...
Field-Programmable Gate Arrays (FPGAs) are integrated circuits which can be programmed to implement...
International audienceIn multi-FPGA prototyping systems for circuit verification, serialized time-mu...
This paper studies an architectural issue concerning field programmable gate arrays (FPGAs). The obs...
Abstract—As the logic capacity of field-programmable gate arrays (FPGAs) increases, they are increas...
Abstract—Motivated by the goal of increasing the performance of FPGA-based designs, we propose new S...
This thesis looks at Network-on-Chip design for FPGAs beyond the trade-offs between hard (silicon) a...
Abstract: Studying the architectural evolution of mainstream field programmable gate arrays (FPGAs) ...