The present paper performs an experimental comparative study of the main switching electrical parameters and figures of merit of the octagonal layout style for the planar Silicon-On-Insulator (SOI) Metal-Oxide-Semiconductor (MOS) Field Effect Transistors (MOSFET), named Octo SOI MOSFET (OSM), in comparison with the typical rectangular one, regarding a large range of temperature, varying from 300 K to 573 K. The devices were manufactured in a 2 μm fully-depleted SOI (CMOS) technology and are n-type. The results have shown that the OSM is capable of keeping active the Longitudinal Corner Effect (LCE), PArallel Connection of MOSFETs with Different Channel Lengths Effect (PAMDLE) and Deactivate the Parasitic MOSFETs of the Bird’s Beak Regions E...
Conventional MOSFET has already passed lower than 45nm transistorfabrication. As silicon is now hitt...
Standard Bulk-CMOS-technology targets use-temperatures of not more than 175 °C. Silicon-on-Insulator...
Standard bulk CMOS technology targets operating temperatures of not more than 175°C. Silicon-on-insu...
This present paper performs an experimental comparative study of the main digital parameters and fig...
This paper describes an experimental comparative study between the Silicon-On-Insulator (SOI) metal-...
This paper performs an experimental comparative study of a huge variation of temperature influence (...
This paper investigates and compares experimentally the total ionizing dose (TID) effects in digital...
This paper investigates and compares experimentally the total ionizing dose (TID) effects in the mai...
This work performs an experimental comparative study between the Diamond (hexagonal gate geometry) a...
This work investigates and demonstrates the potential of Silicon-On-Insulator (SOI) MOSFETs for high...
This paper performs an experimental comparative study of the total ionizing dose effects due to the ...
Conventional MOSFET has already passed lower than 45nm transistor fabrication. As silicon is now hit...
Conventional MOSFET has already passed lower than 45nm transistorfabrication. As silicon is now hitt...
Conventional MOSFET has already passed lower than 45nm transistorfabrication. As silicon is now hitt...
Silicon-on-insulator (SOI) technology is an effective approach of mitigating the short channel effec...
Conventional MOSFET has already passed lower than 45nm transistorfabrication. As silicon is now hitt...
Standard Bulk-CMOS-technology targets use-temperatures of not more than 175 °C. Silicon-on-Insulator...
Standard bulk CMOS technology targets operating temperatures of not more than 175°C. Silicon-on-insu...
This present paper performs an experimental comparative study of the main digital parameters and fig...
This paper describes an experimental comparative study between the Silicon-On-Insulator (SOI) metal-...
This paper performs an experimental comparative study of a huge variation of temperature influence (...
This paper investigates and compares experimentally the total ionizing dose (TID) effects in digital...
This paper investigates and compares experimentally the total ionizing dose (TID) effects in the mai...
This work performs an experimental comparative study between the Diamond (hexagonal gate geometry) a...
This work investigates and demonstrates the potential of Silicon-On-Insulator (SOI) MOSFETs for high...
This paper performs an experimental comparative study of the total ionizing dose effects due to the ...
Conventional MOSFET has already passed lower than 45nm transistor fabrication. As silicon is now hit...
Conventional MOSFET has already passed lower than 45nm transistorfabrication. As silicon is now hitt...
Conventional MOSFET has already passed lower than 45nm transistorfabrication. As silicon is now hitt...
Silicon-on-insulator (SOI) technology is an effective approach of mitigating the short channel effec...
Conventional MOSFET has already passed lower than 45nm transistorfabrication. As silicon is now hitt...
Standard Bulk-CMOS-technology targets use-temperatures of not more than 175 °C. Silicon-on-Insulator...
Standard bulk CMOS technology targets operating temperatures of not more than 175°C. Silicon-on-insu...