HIGHLY EFFICIENT AND LINEAR RECONFIGURABLE MM-WAVE CMOS POWER AMPLIFIERS FOR 5G MOBILE COMMUNICATIONS

Thesis (Ph.D.), Electrical Engineering, Washington State UniversityWith the race to next-generation millimeter-wave (mm-wave) fifth-generation (5G) wireless technology, implementation of highly power-efficient transceivers has become an important research topic. Particularly, the design of high-efficiency and frequency-reconfigurable power amplifier (PA) in complementary-metal-oxide-semiconductor (CMOS) technology is of paramount importance as it enables longer battery life and improved thermal management at a low cost in smart portable-devices while supporting multi-standard 5G communications such as 28GHz, 37-40GHz etc. Simultaneously, a PA with large-bandwidth and high-linearity is highly desirable for 5G mobile communications as it can cover multiple wideband-channels with high-order complex-modulation schemes (i.e., 64/512-quadrature-amplitude-modulation (QAM)) while ensuring robust performances against process-voltage-temperature variations. So far, traditional PA architectures have failed to address these critical design challenges and performance goals. This dissertation presents three new architectures for the design of highly-efficient, highly-linear, wideband and frequency-reconfigurable CMOS PAs for mm-wave 5G cellular communications with 15-16dBm of output-power. First, a 40% power-added-efficiency (PAE) frequency-reconfigurable PA with a tunable gate–drain neutralization at 24GHz and 28GHz is investigated in 65nm CMOS. This is the very first demonstration of a frequency-reconfigurable CMOS PA at mm-wave frequencies using tunable-inductor and tunable-transformer. Second, a 25-35GHz neutralized Continuous Class-F (CCF) CMOS PA achieving 26% modulation-PAE at 1.5Gbps and 46.4% peak-PAE is developed. This design is the very first demonstration of a CCF PA at mm-wave, and the reported measured 46.4% PAE is the highest PAE among mm-wave CMOS PAs to-date. Finally, a 28GHz 41%-PAE linear CMOS PA architecture using a transformer-based amplitude-to-phase (AM-PM) pre-distortion correction technique for 5G is investigated and developed. The proposed linearizer adopts a transformer-based self-compensated pre-distortion network to correct a detrimental AM-PM distortion due to non-linear gate-source capacitance (Cgs) in CMOS PAs. This linearization method mitigates the large-gain reduction problem in traditionally used capacitor-based linearization approaches while consuming no extra-power or introducing additional circuity. Subsequently, significant improvement in modulated-PAE and linearity is achieved. These three PA architectures provide distinct merits of advancing the knowledge of high-linearity, high-efficiency, wideband and frequency-reconfigurable fully-integrated CMOS PA design at mm-wave for next-generation multi-Gbps 5G communications by presenting original circuit topologies, fully supported by analytical-equations, chip-fabrication and comprehensive large-signal measurement results.Washington State University, Electrical Engineerin