Two new analog squarer circuits employing only seven MOS transistors are proposed in this study. The second proposed analog squarer is derived from the first one with slight modifications. MOS transistors used in both of the proposed analog squarers are operated in the saturation region. They are constructed as voltage input and current output. They have high input and high output impedances; consequently, they can be connected with other structures easily. Both of the proposed analog squarers have low power dissipation. However, they need some active component matching conditions. A four quadrant analog multiplier is given as an application example. Workability of the proposed analog squarers is verified by some SPICE simulation results. A...
A novel 4-quadrant analog multiplier using Floating Gate MOS (FGMOS) transistors operating in satura...
This paper describes a new CMOS current mode four-quadrant analog multiplier circuit. The proposed d...
A four-quadrant NMOS transconductance multiplier including plural NMOS transistors formed in a subst...
Two new analog squarer circuits employing only seven MOS transistors are proposed in this study. The...
A new cascadable CMOS based voltage squarer circuit having voltage input/current output and its anal...
A new cascadable CMOS based voltage squarer circuit having voltage input/current output and its anal...
351-357A new cascadable CMOS based voltage squarer circuit having voltage input/current output and ...
A new circuit configuration for an MOS four-quadrant analog multiplier circuit is presented. It is b...
A new circuit configuration for an MOS four-quadrant analog multiplier circuit is presented. It is b...
A novel analogue CMOS circuit is presented which performs the arithmetical squaring of a voltage, us...
This paper concerns an analog CMOS multiplier based on a novel approach to compensate for non ideal...
The four-quadrant analog multipliers (FQAM) are widely used in signal processing applications such a...
The paper presents quarter-square analog four-quadrant multipliers, based on proprietary architectur...
Abstract In this paper, a novel current mode enhanced input range four-quadrant analog multiplier i...
In this paper, a novel current mode CMOS four-quadrant analog multiplier circuit is presented. The m...
A novel 4-quadrant analog multiplier using Floating Gate MOS (FGMOS) transistors operating in satura...
This paper describes a new CMOS current mode four-quadrant analog multiplier circuit. The proposed d...
A four-quadrant NMOS transconductance multiplier including plural NMOS transistors formed in a subst...
Two new analog squarer circuits employing only seven MOS transistors are proposed in this study. The...
A new cascadable CMOS based voltage squarer circuit having voltage input/current output and its anal...
A new cascadable CMOS based voltage squarer circuit having voltage input/current output and its anal...
351-357A new cascadable CMOS based voltage squarer circuit having voltage input/current output and ...
A new circuit configuration for an MOS four-quadrant analog multiplier circuit is presented. It is b...
A new circuit configuration for an MOS four-quadrant analog multiplier circuit is presented. It is b...
A novel analogue CMOS circuit is presented which performs the arithmetical squaring of a voltage, us...
This paper concerns an analog CMOS multiplier based on a novel approach to compensate for non ideal...
The four-quadrant analog multipliers (FQAM) are widely used in signal processing applications such a...
The paper presents quarter-square analog four-quadrant multipliers, based on proprietary architectur...
Abstract In this paper, a novel current mode enhanced input range four-quadrant analog multiplier i...
In this paper, a novel current mode CMOS four-quadrant analog multiplier circuit is presented. The m...
A novel 4-quadrant analog multiplier using Floating Gate MOS (FGMOS) transistors operating in satura...
This paper describes a new CMOS current mode four-quadrant analog multiplier circuit. The proposed d...
A four-quadrant NMOS transconductance multiplier including plural NMOS transistors formed in a subst...