Methodology for Performance Optimization in Noise- and Distortion-Canceling LNA

This paper proposes a general methodology for designing noise-canceling low noise amplifiers (LNA). The procedure provides designers a more accurate information of the topology trade-offs in the technology and which restrictions must be imposed to design variables to attain target specifications. Thus, it is especially desirable when opposite specification, such as cut-off frequency, linearity, noise figure or power consumption are required. A CG-CS LNA in a 45 nm SOI CMOS technology is presented, although authors give guidelines to extrapolate the method to other topologies and technologies