International audienceIn this Letter, the authors report on the design, optimisation and electrical measurements of a new fully integrated multiplexing selector fabricated in 0.7-mu m indium phosphide (InP) double-heterojunction bipolar transistor technology. All parts of the circuit were optimised to obtain 200-Gbit/s class of operation. They present electrical performances at 140 and to a record speed of 212 Gbit/s, highlighting their respective measurement challenges. The power consumption of the circuit is 0.5 and 0.8 W for a differential output amplitude of 240 and 730 mV, respectively. This selector has been successfully used as modulator driver in optical transmission experiments up to 204 Gbit/s
In this paper, we report a manufacturable InP DHBT technology, suitable for medium scale mixed-signa...
We report on design and test of state-of-the-art building blocks for a 100 Gb/s demonstrator system:...
system transmitter and receiver with 4-channel 10 Gb/s interface is presented. InP DHBT IC technolog...
International audienceIn this Letter, the authors report on the design, optimisation and electrical ...
This letter reports the potential of an InP-based double-heterojunction bipolar transistor (DHBT) us...
We report the performances of a 0.7-μm InP/GaInAs DHBT developed in III-V Lab demonstrating both f T...
Key components and architecture options are being actively investigated to realize next generation t...
It is now clear that 112-Gb/s data rate is the next step in the network evolution (100-Gb/s Ethernet...
This paper presents a 4:1 multiplexer fabricated in InP double heterojunction bipolar transistor (DH...
In this paper we present the design and optimization of decision and DEMUX circuits fabricated in a ...
Ces travaux présentent l’étude, la conception et la caractérisation de circuits électroniques intégr...
International audienceWe report on an Indium Phosphide (InP) double heterojunction bipolar transisto...
In this paper, we report a manufacturable InP DHBT technology, suitable for medium scale mixed-signa...
This paper compares three single-ended distributed amplifiers (DAs) realized in an in-house InP/InGa...
We report on the development of a double heterojunction bipolar transistor (DHBT) technology on InP ...
In this paper, we report a manufacturable InP DHBT technology, suitable for medium scale mixed-signa...
We report on design and test of state-of-the-art building blocks for a 100 Gb/s demonstrator system:...
system transmitter and receiver with 4-channel 10 Gb/s interface is presented. InP DHBT IC technolog...
International audienceIn this Letter, the authors report on the design, optimisation and electrical ...
This letter reports the potential of an InP-based double-heterojunction bipolar transistor (DHBT) us...
We report the performances of a 0.7-μm InP/GaInAs DHBT developed in III-V Lab demonstrating both f T...
Key components and architecture options are being actively investigated to realize next generation t...
It is now clear that 112-Gb/s data rate is the next step in the network evolution (100-Gb/s Ethernet...
This paper presents a 4:1 multiplexer fabricated in InP double heterojunction bipolar transistor (DH...
In this paper we present the design and optimization of decision and DEMUX circuits fabricated in a ...
Ces travaux présentent l’étude, la conception et la caractérisation de circuits électroniques intégr...
International audienceWe report on an Indium Phosphide (InP) double heterojunction bipolar transisto...
In this paper, we report a manufacturable InP DHBT technology, suitable for medium scale mixed-signa...
This paper compares three single-ended distributed amplifiers (DAs) realized in an in-house InP/InGa...
We report on the development of a double heterojunction bipolar transistor (DHBT) technology on InP ...
In this paper, we report a manufacturable InP DHBT technology, suitable for medium scale mixed-signa...
We report on design and test of state-of-the-art building blocks for a 100 Gb/s demonstrator system:...
system transmitter and receiver with 4-channel 10 Gb/s interface is presented. InP DHBT IC technolog...