Proposal of a readout technique for low-pitch pixel devices

The up-to-date radiation position pixel detectors designed and constructed for high-energy physics, as Large Hadron Collider experiments at CERN, share comparable on-chip readout electronics. They implement full-custom 2D matrixes of sensitive elements, which are basically readout via tokenbased techniques, according to trigger signals. As the readout phase is one of the crucial points of large matrix devices, here it is described a novel readout architecture of pixel devices, which exploits the features of the state-of-the-art deepsubmicron CMOS technologies and could be applied to lowpitch pixel circuits. This allows for future applications not only to general pixel detectors but also to trackers and trigger systems, wherever an on-line data reduction is required