A FAULT-TOLERANT MULTI-MICROCOMPUTER SYSTEM

Applications of computers have extended to almost every field of human activity including some life-dependent areas and critical control applications. This has increased the demand for highly reliable computers. This thesis presents the design of a fault-tolerant multi-microcomputer system for use in small computation-critical control applications. Basic faulttolerance concepts, redundancy techniques and important issues involved in the design of hardware redundant systems are described. General requirements of applications in the power system control area, in particular a power system stabilizer, are studied and an architectural strategy is finalised. Following the choice of the suitable architecture, the practical problems in the implementation of this system are considered. A detailed description of the ensuing design is then given. A system software consisting of self-check, synchronization, and voting modules is also described. Finally, implementation details of the prototype system are given and results of laboratory testing are presented. The system is expected to be much less expensive than the massive systems previously designed for military or space flight applications, and in the price range of small microcomputers. The design has shown that small commercial units could be built and used in critical applications such as a power system stabilizer that require highly reliable performance