BLIND EQUALIZATION FOR DIGITAL COMMUNICATION SYSTEMS: ALGORITHM AND IMPLEMENTATION

This thesis presents a study on the blind equalization for high speed digital communication systems. The thesis can be divided into two parts, the first part involves the theoretical issues about the blind equalization, the second part addresses the problem of practical implementation. The thesis begins with some basic concepts and theories of the channel equalization, which are fundamentals for designing both trained equalizers and blind equalizers, and then introduces a blind equalization algorithm called the Constant Modulus Algorithm (CMA). Next presented in the thesis is a decision-directed algorithm that is suitable for blind equalizations. Its stability and convergence properties are analyzed in the thesis. Also, the thesis proposes a hybrid blind equalization scheme that combines the decision-directed algorithm and the CMA, which can take advantages of both them. Numerical simulations with QAM signals have been carried out to test the performances of the new algorithm. The second part of the thesis presents a hardware equalizer design which has be implemented in a FPGA chip. To simulate the work of the equalizer in real-time, I also designed a channel simulator and a channel simulator, which, together with a high-frequency signal generator, consists a test-bed for real-time simulation. Based on the results from the real-time simulation, the performance of the hardware equalizer and the test-bed is discussed. Finally, some suggestions for further work are included at the end of the thesis