A Baseband-Matching-Resistor Noise-Canceling Receiver Architecture to Increase In-Band Linearity Achieving 175MHz TIA Bandwidth with a 3-Stage Inverter-Only OpAmp

Abstract—In this paper we propose a baseband noise-canceling receiver architecture to increase in-band linearity. Key feature of the architecture is that all active circuits are in baseband, including the LNTA. The receiver targets high IF bandwidths, enabled by a TIA composed of an OpAmp using only inverters. The receiver is fabricated in 22nm FDSOI CMOS. Measured results show an in-band IIP3 of > 9dBm for an IF bandwidth of 175MHz with sub-5dB NF across 1-6GHz LO