The benefits of a gate-normal tunneling architecture in enhancing the on-current and average subthreshold swing of tunneling field-effect transistors were scrutinized in experiment through careful physical analysis of a Si0.50Ge0.50/Si heterostructure. In accordance with theoretical predictions, it is confirmed that the on-current is governed by line tunneling scaling with the source-gate overlap area of our devices. Our analysis identifies the early onset of parasitic diagonal tunneling paths as most detrimental for a low average subthreshold swing. By counter doping the channel, this onset can be shifted favorably, permitting low average subthreshold swings down to 87 mV/dec over four decades of drain current and high on-off current ratio...
This paper presents optimization techniques for 20 nm channel length novel Si/SiGe heterojunction p-...
478-485This paper investigates a hetero-junction vertical t-shape tunnel field effect transistor and...
This paper presents a Tunneling Field Effect Transistor concept with a vertical SiGe/Si hetero tunne...
The benefits of a gate-normal tunneling architecture in enhancing the on-current and average subthre...
In this paper we report on our progress with SiGe gate-normal / line tunneling FETs, highlighting re...
This paper provides an experimental proof that both the ON-current ION and the subthreshold swing SS...
In this paper we analyze the capabilities in terms of average subthreshold swing and on-current of S...
In this letter, we systematically investigate the impact of gate length and channel orientation on t...
In this letter, we systematically investigate the impact of gate length and channel orientation on t...
Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Comp...
For the past decades, down-scaling of metal-oxide-semiconductor field-effect-transistors (MOSFET) de...
As the conventional metal oxide semiconductor field-effect transistor (MOSFET) keep scaling down to ...
Scaling of nanoelectronics consequently comes along with power consumption in integrated circuits, e...
The Tunnel-FET (TFET) device is a gated reverse biased p-i-n junction whose working principle is bas...
This paper presents a new integration scheme to fabricate a Si/Si 0.55 Ge0.45 heterojunction line tu...
This paper presents optimization techniques for 20 nm channel length novel Si/SiGe heterojunction p-...
478-485This paper investigates a hetero-junction vertical t-shape tunnel field effect transistor and...
This paper presents a Tunneling Field Effect Transistor concept with a vertical SiGe/Si hetero tunne...
The benefits of a gate-normal tunneling architecture in enhancing the on-current and average subthre...
In this paper we report on our progress with SiGe gate-normal / line tunneling FETs, highlighting re...
This paper provides an experimental proof that both the ON-current ION and the subthreshold swing SS...
In this paper we analyze the capabilities in terms of average subthreshold swing and on-current of S...
In this letter, we systematically investigate the impact of gate length and channel orientation on t...
In this letter, we systematically investigate the impact of gate length and channel orientation on t...
Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Comp...
For the past decades, down-scaling of metal-oxide-semiconductor field-effect-transistors (MOSFET) de...
As the conventional metal oxide semiconductor field-effect transistor (MOSFET) keep scaling down to ...
Scaling of nanoelectronics consequently comes along with power consumption in integrated circuits, e...
The Tunnel-FET (TFET) device is a gated reverse biased p-i-n junction whose working principle is bas...
This paper presents a new integration scheme to fabricate a Si/Si 0.55 Ge0.45 heterojunction line tu...
This paper presents optimization techniques for 20 nm channel length novel Si/SiGe heterojunction p-...
478-485This paper investigates a hetero-junction vertical t-shape tunnel field effect transistor and...
This paper presents a Tunneling Field Effect Transistor concept with a vertical SiGe/Si hetero tunne...