ATLAS Pixel Detector and readout upgrades for the improved LHC performance

Since the moment it was first started in 2008, the LHC particle accelerator at CERN continued to constantly increase its center-of-mass energy and luminosity. The entire LHC lifetime can be divided into several phases; in the first period the collider was running at an energy of 7-8 TeV and a luminosity of ∼ 10 33 cm −2 s −1 . After that, the energy was increased to 13 TeV and the luminosity to 1-2·10 34 cm −2 s −1 (Phase-0 ). During next years, LHC will undergo two more series of upgrades; after the first one it will reach the design energy of 14 TeV and a luminosity of 2-3·10 34 cm −2 s −1 (Phase-I ), and in the last phase (Phase-II ) the luminosity will be increased to ∼ 7 · 10 34 cm −2 s −1 . To keep up with the augmented detector performance, the LHC detectors where (and will be) upgraded as well. This work will focus on the ATLAS detector - one of the four main experiments of LHC - and in particular on its Pixel Detector. The ATLAS Pixel Detector was first upgraded in 2015, with the introduction of a new pixel layer - called IBL - to compensate for the B-layer inefficiencies and dead pixels and to increase the tracking performance for Phase-0 and Phase-I. IBL features smaller pixel size compared to the other layers, and higher granularity. The detector layout, combined with the higher LHC luminosity, led to an increased amount of data to be transmitted and analyzed, constituting a challenge for the read-out system. For this reason the previous readout chain was completed renovated and two new boards, called IBL-ROD and IBL-BOC, were designed to interface IBL. The two cards provide higher bandwidth and feature more recent technologies and high level control capabilities. Between 2016 and 2018 the collider continued to increase its luminosity, exceed- ing its design value. As a result, the old readout chain still used for the rest of the Pixel Detector was completely saturated, and it was gradually replaced by the new system (IBL-ROD and IBL-BOC). While the hardware is already in place, the firmware and software utilities of the Pixel Detector readout chain are in constant evolution, in order to be able to provide good quality data even at the harsher en- vironmental conditions of Phase-I LHC. The second major upgrade involving the ATLAS Pixel Detector will be in 2024- 2026, when the Inner Detector will be completely replaced by ITk, entirely made of silicon sensors. The new pixel detector will feature even smaller pixels built with 65 nm technology and higher granularity and data rates. To be able to sustain the more difficult conditions, another readout upgrade will be required; the final design has not been decided yet and is still under consideration. Two of the main candidates to implement the final system are the πLUP project in Bologna - which produced the πLUP readout board - and the FELIX collaboration - which involves several institutes all over the world and produced the readout card FLX-712, that will be used by some ATLAS sub-detectors during Phase-I upgrade. This work will give an overview on the ATLAS Pixel Detector and will analyze the motivations that led to its upgrades. The current and future DAQ systems will also be discussed, focusing on the technologies adopted, the detector requirements and the results obtained