A RESEARCH ON HIGH : PERFORMANCE ANALOG-TO-DIGITAL CONVERTERS IN WIRELESS COMMUNICATION SYSTEMSIN

To realize next-generation high-throughput wireless communication systems, it is essential to develop analog-to-digital converters (ADC) with high conversion speed, high resolution, low power, and low operational supply voltage. In this work, the design methodologies and the new circuit architectures for these high-performance ADCs are researched.First, the methods to optimize these performances for ADCs were confirmed. In a pipeline ADC which is promising to realize the high-throughput systems, the size of sampling capacitors and the power dissipation of the operational amplifiers tends to determine the performances for the ADCs. The proposed circuit to measure small relative mismatches between the sampling capacitors facilitates the size optimization of them. Moreover, the proposed nonlinear model allows to estimate the number of conversion stages to minimize the total dissipated power of the amplifiers used in a pipeline ADC more precisely than the conventional linear model. Besides, the theoretical and experimental analyses for two conventional low power techniques for a pipeline ADC manifest the effective method to reduce the power of the operational amplifiers in it.Next, the higher-performance ADCs for various types of wireless systems were developed based on the confirmed methods. For next-generation cellular system such as LTE-advanced, a low-power, 12-bit and 100-MS/s pipeline ADC is developed. the 2.5bit/stage configuration, the I/Q amplifier sharing techniques and the proposed pseudo-differential operational amplifiers with two-gain-stage gain-boosting amplifiers achieve the lowest power in the reported pipeline ADCs with equivalent speeds and resolutions. In addition, a 12-bit and 40-MS/s pipeline ADC was prototyped for non-cellular system such as WLAN/WiMAX. The improved pseudo-differential amplifiers can stabilize the output common-mode voltage, operating from low power-supply voltage of 0.9V. Furthermore, a flash ADC with the high conversion speed of 3GS/s are developed for millimeter-wave wireless communication system. The proposed calibration technique efficiently suppresses the degradation of the resolution due to the DC offset voltage generated in preamps and comparators from low supply voltage of 1V, keeping the required resolution even at Nyquist input frequency.博士(工学)法政大学 (Hosei University