Solderless Leadframe Assisted Wafer-Level Packaging Technology for Power Electronics

International audienceThis paper presents a wafer-level pre-packagingtechnology for power devices. The concept consists in theimplementation of a thick 3D patterned copper leadframeensuring the interconnections of the power devices amongthem or with the other components of the converter. Themetallic leadframe is bonded between two wafers ofsemiconductor devices enabling the 3D power moduleintegration by the 3D stacking of one or multiple switchingcells. Specific technology developments are introduced,practical realizations of the concept are presented and theelectrical characterizations of the first prototypes arediscusse