Interface trap and oxide charge generation under negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with ultrathin plasma-nitrided SiON gate dielectrics

The interface trap generation (Δ Nit) and fixed oxide charge buildup (Δ Not) under negative bias temperature instability (NBTI) of p -channel metal-oxide-semiconductor field-effect transistors (p MOSFETs) with ultrathin (2 nm) plasma-nitrided SiON gate dielectrics were studied using a modified direct-current-current-voltage method and a conventional subthreshold characteristic measurement. Different stress time dependences were shown for Δ Nit and Δ Not. At the earlier stress times, Δ Nit dominates the threshold voltage shift (Δ Vth) and Δ Not is negligible. With increasing stress time, the rate of increase of Δ Nit decreases continuously, showing a saturating trend for longer stress times, while Δ Not still has a power-law dependence on stress time so that the relative contribution of Δ Not increases. The thermal activation energy of Δ Nit and the NBTI lifetime of p MOSFETs, compared at a given stress voltage, are independent of the peak nitrogen concentration of the SiON film. This indicates that plasma nitridation is a more reliable method for incorporating nitrogen in the gate oxide