Fully differential, 40 Gb/s regulated cascode transimpedance amplifier in 0.13 μm SiGe BiCMOS technology

A broadband differential Transimpedance amplifier (TIA) has been designed and measured in 0.13μm BiCMOS Technology. Regulated Cascode (RGC) configuration has been employed to reduce the effect of the large parasitic capacitor of the PIN diode. The added CPD, representing PIN diode parasitic capacitor, is 300fF. The TIA has 53.6 dBΩ differential transimpedance gain and 28GHz measured bandwidth. The total measured integrated input referred noise is 6.11μArms. The TIA chip including the TIA and 3 stages of buffer consumes 110mW power from a 3V power supply. The active chip area is 330μmx210μm and the total chip area including the pads is 1050μmx530μm