A 1.9GHz monolithic superheterodyne receiver front-end with 300MHz IF, on-chip tunable image reject filter and VCO is presented. The receiver was fabricated on a 0.5μm bipolar process. The 2.2GHz VCO was realized with ground-shielded inductors. The performance is as follows: conversion gain: 25.6dB, noise figure: 4.5dB, image rejection: 65dB, and phase noise of -103dBc/Hz at 100kHz offset. The LO-IF isolation improved compared to a previously fabricated front-end with off-chip VCO. This receiver front-end has NF, linearity, and phase noise suitable for DCS-1800
There are nowadays strong business and technical demands to integrate radio- frequency (RF) receiver...
A 1.8-GHz CMOS VCO is presented, employing a monolithic transformer as an inductance with voltage-co...
An integrated analog tuner for Open-Cable applications is designed in a standard 0.18-μm CMOS proces...
A 1.9-GHz monolithic superheterodyne receiver front-end with 300-MHz IF on-chip tunable image-reject...
The zero/low intermediate frequency (IF) receiver (RX) architecture has enabled full CMOS integratio...
A truly-monolithic 900-MHz CMOS wireless receiver with on-chip RF and IF filters and a fully-integra...
Abstract—A broadband monolithic image rejection subharmonic mixer using a standard 0.18µm CMOS techn...
In this paper, the analysis of a multi-standard, high image-reject front-end is presented. The front...
A fully integrated RF single-conversion heterodyne receiver front-end for ISM band (2.44 GHz) wirele...
This dissertation demonstrates a monolithic 900-MHz CMOS wireless transceiver. Single-conversion arc...
A heterodyne receiver chipset for 140 GHz passive millimeter wave imaging applications is presented ...
There is a strong demand for wireless communications in civilian and military applications, and spac...
A 1.4 V, 9 mA monolithic LC-tank voltage-controlled oscillator (VCO) fabricated in a standard 0.35 μ...
This letter presents the design and implementation of the largest reported bandwidth of a 60 GHz up/...
M.Ing. (Electrical And Electronic Engineering)This dissertation presents a fully integrated image re...
There are nowadays strong business and technical demands to integrate radio- frequency (RF) receiver...
A 1.8-GHz CMOS VCO is presented, employing a monolithic transformer as an inductance with voltage-co...
An integrated analog tuner for Open-Cable applications is designed in a standard 0.18-μm CMOS proces...
A 1.9-GHz monolithic superheterodyne receiver front-end with 300-MHz IF on-chip tunable image-reject...
The zero/low intermediate frequency (IF) receiver (RX) architecture has enabled full CMOS integratio...
A truly-monolithic 900-MHz CMOS wireless receiver with on-chip RF and IF filters and a fully-integra...
Abstract—A broadband monolithic image rejection subharmonic mixer using a standard 0.18µm CMOS techn...
In this paper, the analysis of a multi-standard, high image-reject front-end is presented. The front...
A fully integrated RF single-conversion heterodyne receiver front-end for ISM band (2.44 GHz) wirele...
This dissertation demonstrates a monolithic 900-MHz CMOS wireless transceiver. Single-conversion arc...
A heterodyne receiver chipset for 140 GHz passive millimeter wave imaging applications is presented ...
There is a strong demand for wireless communications in civilian and military applications, and spac...
A 1.4 V, 9 mA monolithic LC-tank voltage-controlled oscillator (VCO) fabricated in a standard 0.35 μ...
This letter presents the design and implementation of the largest reported bandwidth of a 60 GHz up/...
M.Ing. (Electrical And Electronic Engineering)This dissertation presents a fully integrated image re...
There are nowadays strong business and technical demands to integrate radio- frequency (RF) receiver...
A 1.8-GHz CMOS VCO is presented, employing a monolithic transformer as an inductance with voltage-co...
An integrated analog tuner for Open-Cable applications is designed in a standard 0.18-μm CMOS proces...