A nanowatt ADC for ultra low power applications

An 8-bit successive approximation analog-to-digital converter (ADC) for ultra low power applications is presented. It is designed in a standard 0.13μm CMOS process technology. The design can operate with low voltage supplies down to 0.45 V. It makes use of sub-threshold transistor operation to achieve nanowatts of power consumption at sample rates exceeding 60kS/s. A specially designed switch allows large input swings. Post layout simulations show an INL and DNL of approximately 0.3LSB and 0.45LSB respectively