The use of model checking to validate descriptions of digital systems lacks a coverage metrics. How many properties has the verification engineer to define in order to assure the correctness of a design? An estimation methodology based on a high level fault model has been formally presented by A. Fedeli et al. (2003). It evaluates properties incompleteness. We propose a SystemC framework that implements the methodology in a completely automatic way. Experimental results highlight both the effectiveness of the methodology and the flexibility of the SystemC framework to measure the properties incompleteness on different kind of designs, which require different model checking approaches
This report presents a basic set of guidelines to facilitate the generation of expected properties i...
A critical part of the design of HW/SW systems concerns the definition of the HW/SW interface. Such ...
The growing complexity of System-on-a-Chips (SoCs) and rapidly decreasing time-to-market have pushed...
The use of model checking to validate descriptions of digital systems lacks a coverage metrics. The ...
Verification engineers cannot guarantee the correctness of the system implementation by model checki...
The use of model checking to validate descriptions of digital systems lacks a coverage metrics. If t...
Verification of circuit description by means of model checking means to write propositions, expresse...
Verification of a design, based on model checking, requires the identification of a set of formal pr...
One of the emerging challenges in formal property verification (FPV) technology is the problem of de...
Synthesis tools for SystemC descriptions are mature enough to cover the design flow from the system ...
Evaluating quality attributes of a design model in the early stages of development can significantly...
A critical part of the design of HW/SW systems concerns the definition of the HW/SW interface. Such ...
A software specification is often the result of an iterative process that transforms an initial inco...
Today’s complex systems are modeled on a high level of abstraction. In this context, C/C++-based des...
The combined effects of devices increased complexity and reduced design cycle time creates a testing...
This report presents a basic set of guidelines to facilitate the generation of expected properties i...
A critical part of the design of HW/SW systems concerns the definition of the HW/SW interface. Such ...
The growing complexity of System-on-a-Chips (SoCs) and rapidly decreasing time-to-market have pushed...
The use of model checking to validate descriptions of digital systems lacks a coverage metrics. The ...
Verification engineers cannot guarantee the correctness of the system implementation by model checki...
The use of model checking to validate descriptions of digital systems lacks a coverage metrics. If t...
Verification of circuit description by means of model checking means to write propositions, expresse...
Verification of a design, based on model checking, requires the identification of a set of formal pr...
One of the emerging challenges in formal property verification (FPV) technology is the problem of de...
Synthesis tools for SystemC descriptions are mature enough to cover the design flow from the system ...
Evaluating quality attributes of a design model in the early stages of development can significantly...
A critical part of the design of HW/SW systems concerns the definition of the HW/SW interface. Such ...
A software specification is often the result of an iterative process that transforms an initial inco...
Today’s complex systems are modeled on a high level of abstraction. In this context, C/C++-based des...
The combined effects of devices increased complexity and reduced design cycle time creates a testing...
This report presents a basic set of guidelines to facilitate the generation of expected properties i...
A critical part of the design of HW/SW systems concerns the definition of the HW/SW interface. Such ...
The growing complexity of System-on-a-Chips (SoCs) and rapidly decreasing time-to-market have pushed...