In this paper we describe our experience with Teapot [7], a domain-specific language for writing cache coherence protocols. Cache coherence is of concern when parallel and distributed computing systems make local replicas of shared data to improve scalability and performance. In both distributed shared memory systems and distributed file systems, a coherence protocol maintains agreement among the replicated copies as the underlying data are modified by programs running on the system. Cache coherence protocols are notoriously difficult to implement, debug, and maintain. Unfortunately, protocols are not off-the-shelf items, as their details depend on the requirements of the system under consideration. This paper presents case studies detailin...
Emerging multiprocessor architectures such as chip multiprocessors, embedded architectures, and mas...
Cache coherence protocols play an important role in the performance of distributed and centralized s...
Recent developments in shared-memory multiprocessor systems advocate using off-the-shelf hardware to...
In this paper we describe our experience with Teapot [7], a domain-specific language for writing cac...
In this paper, we describe Teapot, a domain-specific language for writing cache coherence protocols....
Recent shared-memory parallel computer systems offer the exciting possibility of customizing memory ...
Cache coherence is one of the main challenges to tackle when designing a shared-memory multiprocesso...
Caches have the potential to provide multiprocessors with an automatic mechanism for reducing both n...
[[abstract]]A cache coherence protocol for a multiprocessor system. Each processor in the system has...
. We address the problem of developing efficient cache coherence protocols implementing distributed ...
This thesis presents a new cache coherence protocol for shared bus multicache systems, and addresses...
Thesis (Ph. D.)--University of Washington, 1987Shared-memory multiprocessors offer increased computa...
We propose a twophase ImperativeDirective design methodology for designing cache coherence protocols...
Directory-based cache coherence is a popular mechanism for chip multiprocessors and multicores. The ...
During the last few years many different memory consistency protocols have been proposed. These rang...
Emerging multiprocessor architectures such as chip multiprocessors, embedded architectures, and mas...
Cache coherence protocols play an important role in the performance of distributed and centralized s...
Recent developments in shared-memory multiprocessor systems advocate using off-the-shelf hardware to...
In this paper we describe our experience with Teapot [7], a domain-specific language for writing cac...
In this paper, we describe Teapot, a domain-specific language for writing cache coherence protocols....
Recent shared-memory parallel computer systems offer the exciting possibility of customizing memory ...
Cache coherence is one of the main challenges to tackle when designing a shared-memory multiprocesso...
Caches have the potential to provide multiprocessors with an automatic mechanism for reducing both n...
[[abstract]]A cache coherence protocol for a multiprocessor system. Each processor in the system has...
. We address the problem of developing efficient cache coherence protocols implementing distributed ...
This thesis presents a new cache coherence protocol for shared bus multicache systems, and addresses...
Thesis (Ph. D.)--University of Washington, 1987Shared-memory multiprocessors offer increased computa...
We propose a twophase ImperativeDirective design methodology for designing cache coherence protocols...
Directory-based cache coherence is a popular mechanism for chip multiprocessors and multicores. The ...
During the last few years many different memory consistency protocols have been proposed. These rang...
Emerging multiprocessor architectures such as chip multiprocessors, embedded architectures, and mas...
Cache coherence protocols play an important role in the performance of distributed and centralized s...
Recent developments in shared-memory multiprocessor systems advocate using off-the-shelf hardware to...