Summarization: Dynamic reconfiguration allows for the reuse of the same hardware by different tasks of an application at different stages of its execution. However, reconfiguring the hardware at run-time incurs a configuration delay causing performance degradation of the application. This paper evaluates a preloading model that hides the configuration overhead. An existing preloading model is augmented according to the physical constraints of the system. A reduction of 6% up to 86% in execution time has been obtained with the new model.Παρουσιάστηκε στο: IEEE International Conference on Field Programmable Logic and Aplication
Processor design techniques, such as pipelining, superscalar, and VLIW, have dramatically decreased ...
The effective use of dynamic reconfiguration re-quires the designer to address many implementation i...
delays. Multiprocessor system models are extensively used in modelling transaction processing system...
Summarization: Dynamic reconfiguration is gaining popularity [2], [4] but it may cause degradation o...
Summarization: Partial reconfiguration suffers from the inherent high latency and low throughput whi...
Dynamic reconfiguration is gaining popularity [2], [4] but it may cause degradation of overall execu...
Abstract — There are a growing number of recon-figurable architectures that combine the advantages o...
This report addresses the problem of minimizing the average execution time of an application, based ...
Summarization: The most popular representative devices of reconfigurable computing are field-program...
Dynamically reconfigurable hardware (DRHW) not only has high silicon reusability, but it can also de...
The extensive use of reconfigurable computing devices has imposed a new category of processors, the...
Abstract—The most popular representative devices of re-configurable computing are the Field Programm...
Summarization: Fine-grain reconfigurable devices suffer from the time needed to load the configurati...
Multiprocessor system models are extensively used in modelling transaction processing systems, nodes...
Given the widespread use of real-time multitasking systems, there are tremendous optimization opport...
Processor design techniques, such as pipelining, superscalar, and VLIW, have dramatically decreased ...
The effective use of dynamic reconfiguration re-quires the designer to address many implementation i...
delays. Multiprocessor system models are extensively used in modelling transaction processing system...
Summarization: Dynamic reconfiguration is gaining popularity [2], [4] but it may cause degradation o...
Summarization: Partial reconfiguration suffers from the inherent high latency and low throughput whi...
Dynamic reconfiguration is gaining popularity [2], [4] but it may cause degradation of overall execu...
Abstract — There are a growing number of recon-figurable architectures that combine the advantages o...
This report addresses the problem of minimizing the average execution time of an application, based ...
Summarization: The most popular representative devices of reconfigurable computing are field-program...
Dynamically reconfigurable hardware (DRHW) not only has high silicon reusability, but it can also de...
The extensive use of reconfigurable computing devices has imposed a new category of processors, the...
Abstract—The most popular representative devices of re-configurable computing are the Field Programm...
Summarization: Fine-grain reconfigurable devices suffer from the time needed to load the configurati...
Multiprocessor system models are extensively used in modelling transaction processing systems, nodes...
Given the widespread use of real-time multitasking systems, there are tremendous optimization opport...
Processor design techniques, such as pipelining, superscalar, and VLIW, have dramatically decreased ...
The effective use of dynamic reconfiguration re-quires the designer to address many implementation i...
delays. Multiprocessor system models are extensively used in modelling transaction processing system...