Προπτυχιακή Διατριβή που υποβλήθηκε στη σχολή ΗΜΜΥ του Πολ. Κρήτης για την πλήρωση προϋποθέσεων λήψης του Προπτυχιακού Διπλώματος Ειδίκευσης.Summarization: Mission critical applications rely on both hardware- and software-approaches for fault-tolerance. With the adoption of multiprocessor systems on chip (MPSoCs), processor fault-tolerance with modular redundancy has become a major issue, cost and performance wise. In this thesis first , we augment a task-parallel runtime system with support for transparent checkpoints of task data that may be written during task execution and seamlessly rerun failed tasks. The system can recover from transient errors during task execution within a single core by rerunning the failed task, as well as from ...
As machines increase in scale, it is predicted that failure rates of supercomputers will correspondi...
The embedded computing revolution is pushing the transition from a single-core processor to a multic...
This article presents a chip multiprocessor (CMP) design that mixes coarse- and fine-grained reconfi...
Semiconductor technology scaling makes chips moresensitive to faults. This paper describes the DeSyR...
Nowadays, dependable computing systems are widely required in mission-critical applications. While t...
Continued CMOS scaling is expected to make future micro-processors susceptible to transient faults, ...
Relentless CMOS scaling coupled with lower design tolerances is making ICs increasingly susceptible ...
Failing hardware is a fact and trends in microprocessor design indicate that the fraction of hardwar...
In recent years, we are witnessing the dawning of the Multi-Processor Systemon- Chip (MPSoC) era. In...
The design of microprocessors is undergoing radical changes that affect the performance and reliabil...
Μεταπτυχιακή Διατριβή που υποβλήθηκε στην σχολή ΗΜΜΥ του Πολυτεχνείου Κρήτης για την πλήρωση προϋποθ...
abstract: Reducing device dimensions, increasing transistor densities, and smaller timing windows, e...
Fault-tolerance is due to the semiconductor technology development important, not only for safety-cr...
Formal performance analysis is now regularly applied in the design of distributed embedded systems s...
Fault-tolerance is due to the semiconductor technology development important, not only for safety-cr...
As machines increase in scale, it is predicted that failure rates of supercomputers will correspondi...
The embedded computing revolution is pushing the transition from a single-core processor to a multic...
This article presents a chip multiprocessor (CMP) design that mixes coarse- and fine-grained reconfi...
Semiconductor technology scaling makes chips moresensitive to faults. This paper describes the DeSyR...
Nowadays, dependable computing systems are widely required in mission-critical applications. While t...
Continued CMOS scaling is expected to make future micro-processors susceptible to transient faults, ...
Relentless CMOS scaling coupled with lower design tolerances is making ICs increasingly susceptible ...
Failing hardware is a fact and trends in microprocessor design indicate that the fraction of hardwar...
In recent years, we are witnessing the dawning of the Multi-Processor Systemon- Chip (MPSoC) era. In...
The design of microprocessors is undergoing radical changes that affect the performance and reliabil...
Μεταπτυχιακή Διατριβή που υποβλήθηκε στην σχολή ΗΜΜΥ του Πολυτεχνείου Κρήτης για την πλήρωση προϋποθ...
abstract: Reducing device dimensions, increasing transistor densities, and smaller timing windows, e...
Fault-tolerance is due to the semiconductor technology development important, not only for safety-cr...
Formal performance analysis is now regularly applied in the design of distributed embedded systems s...
Fault-tolerance is due to the semiconductor technology development important, not only for safety-cr...
As machines increase in scale, it is predicted that failure rates of supercomputers will correspondi...
The embedded computing revolution is pushing the transition from a single-core processor to a multic...
This article presents a chip multiprocessor (CMP) design that mixes coarse- and fine-grained reconfi...