A 25-Gb/s Avalanche Photodetector-Based Burst-Mode Optical Receiver With 2.24-ns Reconfiguration Time in 28-nm CMOS

This paper describes an avalanche photodetector (APD)-based optical receiver, applicable to the burst-mode operation, in 28-nm CMOS technology. With the aims of benefiting the overall optical link power efficiency and link bandwidth, the optical receiver is designed to have high sensitivity and high reconfiguration speed for burst-mode operation. The sensitivity of the receiver is optimized by adjusting the responsivity of APD via its reverse bias voltage, which leads to the highest signal-to-noise ratio (SNR) at the front end. The two-tap feed-forward equalization (FFE), along with two-tap decision feedback equalization, is implemented in a current-integrating fashion to further improve the sensitivity with superior power efficiency to their resistively loaded counterparts. Integrating dc comparator and integrating amplitude comparator are proposed to replace the conventional RC low-pass filters and peak detectors, respectively, in extracting the information of dc offset and signal amplitude within two unit intervals (UIs), empowering significant acceleration of the burst-mode reconfiguration. When the APD is biased at −16 V, its overall responsivity at 1310 nm is 4 A/W, and the optical receiver achieves bit-error-rate (BER) better than 10^(−12) at −16-dBm optical modulation amplitude, 2.24-ns reconfiguration time with 5-dB dynamic range, and 1.37-pJ/b energy efficiency at 25 Gb/s