We combine compositional reasoning and reachability analysis to formally verify the safety of a recent cache coherence protocol. The protocol is a detailed implementation of token coherence, an approach that decouples correctness and performance. First, we present a formal and abstract specification that captures the safety substrate of token coherence, and highlights the symmetry in states of the cache controllers and contents of the messages they exchange. Then, we prove that this abstract specification is coherent, and check whether the implementation proposed by the protocol designers is a refinement of the abstract specification. Our refinement proof is parametric in the number of cache controllers, and is compositional as it reduces t...
International audienceWe present a formal model built for verification of the hardware Tera-Scale AR...
Commercial workload and technology trends are pushing existing shared-memory multiprocessor coherenc...
. We address the problem of developing efficient cache coherence protocols implementing distributed ...
We combine compositional reasoning and reachability analysis to formally verify the safety of a rece...
Abstract. We combine compositional reasoning and reachability analysis to formally verify the safety...
Many future shared-memory multiprocessor servers will both target commercial workloads and use highl...
Cache coherency is crucial to multi-core systems with a shared memory programming model. Coherency p...
<p>The correctness of a cache coherence protocol is crucial to the system since a subtle bug in the ...
We specify a cache coherence protocol for cache-only shared memory multiprocessor architectures usin...
technical reportWe address the problem of developing efficient cache coherence protocols for use in ...
Cache coherency is one of the major issues in multicore systems. Formal methods, in particular model...
technical reportModern chip multiprocessor (CMP) cache coherence protocols are extremely complex an...
Abstract Performance modelling and verification are vital steps in the development cycle of any cach...
We verify some correctness properties of the DASH cache coherence protocol using Ωmega. Ωmega is a l...
We propose a heuristic-based method for discovering inductive invariants in the parameterized verifi...
International audienceWe present a formal model built for verification of the hardware Tera-Scale AR...
Commercial workload and technology trends are pushing existing shared-memory multiprocessor coherenc...
. We address the problem of developing efficient cache coherence protocols implementing distributed ...
We combine compositional reasoning and reachability analysis to formally verify the safety of a rece...
Abstract. We combine compositional reasoning and reachability analysis to formally verify the safety...
Many future shared-memory multiprocessor servers will both target commercial workloads and use highl...
Cache coherency is crucial to multi-core systems with a shared memory programming model. Coherency p...
<p>The correctness of a cache coherence protocol is crucial to the system since a subtle bug in the ...
We specify a cache coherence protocol for cache-only shared memory multiprocessor architectures usin...
technical reportWe address the problem of developing efficient cache coherence protocols for use in ...
Cache coherency is one of the major issues in multicore systems. Formal methods, in particular model...
technical reportModern chip multiprocessor (CMP) cache coherence protocols are extremely complex an...
Abstract Performance modelling and verification are vital steps in the development cycle of any cach...
We verify some correctness properties of the DASH cache coherence protocol using Ωmega. Ωmega is a l...
We propose a heuristic-based method for discovering inductive invariants in the parameterized verifi...
International audienceWe present a formal model built for verification of the hardware Tera-Scale AR...
Commercial workload and technology trends are pushing existing shared-memory multiprocessor coherenc...
. We address the problem of developing efficient cache coherence protocols implementing distributed ...