Drafting in Self-Timed Circuits

Intervals between data items propagating in self-timed circuits are controlled by handshake signals rather than by a clock. The sequence of handshakes can be abstracted as the movement of “tokens”. In many self-timed designs, a trailing token will catch up with a leading token, even when it trails by thousands of gate delays. Simulations in SPICE of a simple GasP circular FIFO reveal this effect. Contrary to earlier work, we find the cause of drafting to be charge stored on an isolated node between two series transistors. This mechanism occurs in many decision gates that implement a logical AND. The charge on the floating internal node can drift between actions and thereby change the delay of the gate. Drafting occurs because the delay of a trailing token through a self-timed stage depends on when the leading token departed. This effect, called “drafting”, can be seen in many of the self-timed designs, e.g., GasP, Mousetrap, Click, Micropipeline. Drafting behavior may be modulated by controlling the internal node of the GasP NOR gate. This offers possibilities for using self-timed circuits in applications where the interval between data items carries information for spiking neural networks, security or real-time signal processing