Validation and Enhancement of a Three-level Inverter for Applications in Real-time Simulations

The motivation of this thesis is to perform a hardware validation of a three-level inverter in real-time simulation. Real-time simulators enable faster design and prototyping of controllers without the need of building hardware based test benches. But, it is also essential that the virtual models behave the way they were supposed to, and produce equivalent output as the physical setups. Power electronic systems often have very fast switching devices, which are an inhibiting factor for real-time simulation, as the simulator must have the capability to produce high resolution samples of the gate pulses of these fast acting devices. A virtual model for the three- level inverter is available already for real-time simulation. This model had been tested with the outcome of other non-real-time solvers such as the one from Simscape Power System’s Simulink, but not alongside with a physical inverter. Hence, a physical inverter was operated along with its virtual model in a real-time simulator to verify the model. Real-time simulators use different approaches to model power electronic systems and also make them suitable for such simulations. One such approach is to solve for the nodal voltages and currents using fixed admittance matrices derived from the network. This fixed matrix contains a switch conductance parameter derived from a discrete time model of an ideal switch. The choice of this parameter is very crucial in determining the accuracy of the real-time simulations. A number of ways are used to optimize this parameter, but optimizing a proper value is always a challenge