A via is experimentally characterized by using highfrequency s-parameter measurements. Test patterns are designed and fabricated by using a package process. They are measured by using VNA (vector network analyzer) up to 25GHz. The parasitic effects due to access lines for on-wafer probing are deembedded. Then modeling the via as two equivalent circuits (Ttype and Pi-type), the circuit model parameters are determined. It is shown that the T-type circuit model has excellent agreement with the measured s-parameters
Interconnect lines are characterized in the wafer-level for high-speed circuit performance evaluatio...
This paper presents an in- depth investigation of the silicon substrate characteristics based on fre...
A novel custom high-speed test chip and data reduction technique that allows for the accurate determ...
A via is experimentally characterized by using high-frequency s-parameter measurements. Test patter...
Interconnect lines with inter-layer vias are experimentally characterized by using high-frequency S-...
The frequency-variant characteristics of a pair of package power and ground net are experimentally i...
Measurement-based electrical characterization of through silicon via (TSV) and redistribution layer ...
Due to inherent resonance effects and frequency-variant dielectric properties, it is very difficult ...
As chip complexity and speed continue to increase, the packaging interconnects increasingly affect t...
In this article, a new experimental characterization technique for coupled transmission lines is pre...
Vias in transmission lines cause significant waveform distortion due to electromagnetic wave reflect...
In this study, the effects of the frequencydependent characteristics of through-silicon vias (TSVs) ...
In this paper we examine different approaches to the extraction of frequency dependent line paramete...
ABSTRACT Beyond GHz operation frequency and Gb/s transfer rate bring a big challenge to high speed p...
A 26-layer printed circuit board including several test sites has been analyzed. All the sites have ...
Interconnect lines are characterized in the wafer-level for high-speed circuit performance evaluatio...
This paper presents an in- depth investigation of the silicon substrate characteristics based on fre...
A novel custom high-speed test chip and data reduction technique that allows for the accurate determ...
A via is experimentally characterized by using high-frequency s-parameter measurements. Test patter...
Interconnect lines with inter-layer vias are experimentally characterized by using high-frequency S-...
The frequency-variant characteristics of a pair of package power and ground net are experimentally i...
Measurement-based electrical characterization of through silicon via (TSV) and redistribution layer ...
Due to inherent resonance effects and frequency-variant dielectric properties, it is very difficult ...
As chip complexity and speed continue to increase, the packaging interconnects increasingly affect t...
In this article, a new experimental characterization technique for coupled transmission lines is pre...
Vias in transmission lines cause significant waveform distortion due to electromagnetic wave reflect...
In this study, the effects of the frequencydependent characteristics of through-silicon vias (TSVs) ...
In this paper we examine different approaches to the extraction of frequency dependent line paramete...
ABSTRACT Beyond GHz operation frequency and Gb/s transfer rate bring a big challenge to high speed p...
A 26-layer printed circuit board including several test sites has been analyzed. All the sites have ...
Interconnect lines are characterized in the wafer-level for high-speed circuit performance evaluatio...
This paper presents an in- depth investigation of the silicon substrate characteristics based on fre...
A novel custom high-speed test chip and data reduction technique that allows for the accurate determ...