An optimistic ternary simulation of gate races

AbstractThe detection of timing problems in digital networks is of considerable importance. In particular it is desirable to have efficient methods for discovering critical races and hazards. Unfortunately, commercial simulators rarely provide such facilities; in fact, the simulators usually assume that all the gate delays are exactly equal. In contrast to this, binary race analysis frequently assumes that gate delays can be arbitrarily large, though finite. An exception to this is the almost-equal-delay race model, where gates have different delays, but the difference between any two delays cannot be arbitrary. The difficulty with the use of this model is that it is computationally very inefficient. In this paper we define a new ternary model which is very closely related to the binary almost-equal-delay model. Moreover, the ternary model is considerably more efficient, as efficient as the unit delay model; consequently, it could easily be incorporated in simulators