Design and Implementation of 64 Bit IIR Filters Using Vedic Multipliers

AbstractDigital signal processing operation utilizing Vedic mathematics which performs the signal handling operation like convolution, circular convolution, cross correlation, auto-correlation and filter design. Digital signal processing (DSP) operations are vital part of engineering and medical field. Outlining of DSP operations have numerous methodologies. This configuration procedure gives the analysis of signals to enhance the accuracy of the mathematical calculations. It encourages the time sharing for all signals to process mathematical operations all the while. Vedic mathematics is the ancient math which has a unique method of mental calculation with the assistance of basic rules and standards based on sutras. The utilization of multiplier with higher speed is of most extreme significance to any DSP. Convolution is the fundamental idea of designing Infinite Impulse Response (IIR) filter. IIR filter is likewise called convolution filter. Our project has demonstrated the efficiency of Urdhava-Tiryagbhyam method for multiplication which conveys a distinction in the real procedure of multiplication itself. The configuration of IIR filters utilizing Urdhava-tiryagbhyam sutra. This calculation is performed in Xilinx 13.4 ISE and implemented on vertex-5 FPGA (XC5VLX50T+1136)