Monte Carlo algorithms: performance analysis for some computer architectures

AbstractThe paper deals with the performance analysis of three Monte Carlo algorithms for some models of computer architectures. To estimate the performance and the speedup of these algorithms, we introduce a special modification of the criterion for the time required to achieve a preset probable error and consider a serial (von Neumann) architecture, a pipeline architecture, and two MIMD (Multiple Instruction stream, Multiple Data stream) parallel architectures. An approach to constructing Monte Carlo vector algorithms to be efficiently run on pipeline computers has also been considered