A method of error detection is proposed for noisy logical computer elements. The proposal extends the range of the propositional variables so that residue class check symbols may be used in error detection. The principal consequence is that individual logical elements may be designed to process binary inputs with arbitrary reliability and nonzero channel capacity
We propose a low cost concurrent error detection strategy to improve the Reliability, Availability, ...
Abstract-A linear feedback shift register can be used to compress a serial stream of test result dat...
We propose a low cost concurrent error detection strategy to improve the Reliability, Availability, ...
This paper addresses the relations between logic circuit synthesis, error model and error control co...
With technology scaling, vulnerability to soft errors in random logic is increasing. There is a need...
With technology scaling, vulnerability to soft errors in random logic is increasing. There is a need...
textResidue codes have successfully been used for decades as a low overhead method of arithmetic err...
textResidue codes have successfully been used for decades as a low overhead method of arithmetic err...
Abstract- Error detection in memory applications was proposed to accelerate the majority logic decod...
We propose a low cost concurrent error detection strategy to improve the Reliability, Availability, ...
A novel approach to designing concurrent-error-detecting arithmetic and logic units using Berger cod...
We propose a low cost concurrent error detection strategy to improve the Reliability, Availability, ...
We propose a low cost concurrent error detection strategy to improve the Reliability, Availability, ...
A novel approach to designing concurrent-error-detecting arithmetic and logic units using Berger cod...
In this paper we propose a method for error-correction in IC implementations of Boolean functions. T...
We propose a low cost concurrent error detection strategy to improve the Reliability, Availability, ...
Abstract-A linear feedback shift register can be used to compress a serial stream of test result dat...
We propose a low cost concurrent error detection strategy to improve the Reliability, Availability, ...
This paper addresses the relations between logic circuit synthesis, error model and error control co...
With technology scaling, vulnerability to soft errors in random logic is increasing. There is a need...
With technology scaling, vulnerability to soft errors in random logic is increasing. There is a need...
textResidue codes have successfully been used for decades as a low overhead method of arithmetic err...
textResidue codes have successfully been used for decades as a low overhead method of arithmetic err...
Abstract- Error detection in memory applications was proposed to accelerate the majority logic decod...
We propose a low cost concurrent error detection strategy to improve the Reliability, Availability, ...
A novel approach to designing concurrent-error-detecting arithmetic and logic units using Berger cod...
We propose a low cost concurrent error detection strategy to improve the Reliability, Availability, ...
We propose a low cost concurrent error detection strategy to improve the Reliability, Availability, ...
A novel approach to designing concurrent-error-detecting arithmetic and logic units using Berger cod...
In this paper we propose a method for error-correction in IC implementations of Boolean functions. T...
We propose a low cost concurrent error detection strategy to improve the Reliability, Availability, ...
Abstract-A linear feedback shift register can be used to compress a serial stream of test result dat...
We propose a low cost concurrent error detection strategy to improve the Reliability, Availability, ...
DOI
Add to ORKG