Traditional bulk silicon encounters performance limitations in shrinking CMOS transistor feature size to 65nm. But, through the use of silicon-germanium, strained silicon, and silicon-on-insulator and, ultimately, germanium-on-insulator technology, the life of silicon substrates could be stretched as far as the 22nm generation
Here, we demonstrate a new process to fabricate tensily strained Si On Insulator substrates (sSOI). ...
In this paper, the potential of Silicon-Germanium (SiGe) technology for VLSI logic applications is i...
High mobility materials are being considered to replace Si in the channel to achieve higher drive cu...
Traditional bulk silicon encounters performance limitations in shrinking CMOS transistor feature siz...
Strain techniques, such as incorporating SiGe, should boost performance in future generations of CMO...
textAfter the integrated circuit was invented in 1959, complementary metal-oxidesemiconductor (CMOS...
This paper is made available online in accordance with publisher policies. Please scroll down to vie...
peer reviewedAs scaling of the critical transistor dimensions below 65 nm has been slowed down, the ...
For recent manufacturable CMOS technologies to extend the Moore’s law, the interest in the strain en...
AbstractGene Fitzgerald of MIT (and Amberwave Inc) discussed the history of strained silicon. He exp...
The benefit of high performance strained Si CMOS in terms of technology generations is quantified. I...
International audienceWe report a novel approach for engineering tensely strained Si layers on a rel...
Strained silicon-on-insulator (SSOI) is an emerging material that combines the benefits of strained ...
The scaling capability of germanium-on-insulator (GOI) and silicon-on-insulator (SOI) is investigate...
In this paper, the potential of Silicon-Germanium (SiGe) technology for VLSI logic applications is i...
Here, we demonstrate a new process to fabricate tensily strained Si On Insulator substrates (sSOI). ...
In this paper, the potential of Silicon-Germanium (SiGe) technology for VLSI logic applications is i...
High mobility materials are being considered to replace Si in the channel to achieve higher drive cu...
Traditional bulk silicon encounters performance limitations in shrinking CMOS transistor feature siz...
Strain techniques, such as incorporating SiGe, should boost performance in future generations of CMO...
textAfter the integrated circuit was invented in 1959, complementary metal-oxidesemiconductor (CMOS...
This paper is made available online in accordance with publisher policies. Please scroll down to vie...
peer reviewedAs scaling of the critical transistor dimensions below 65 nm has been slowed down, the ...
For recent manufacturable CMOS technologies to extend the Moore’s law, the interest in the strain en...
AbstractGene Fitzgerald of MIT (and Amberwave Inc) discussed the history of strained silicon. He exp...
The benefit of high performance strained Si CMOS in terms of technology generations is quantified. I...
International audienceWe report a novel approach for engineering tensely strained Si layers on a rel...
Strained silicon-on-insulator (SSOI) is an emerging material that combines the benefits of strained ...
The scaling capability of germanium-on-insulator (GOI) and silicon-on-insulator (SOI) is investigate...
In this paper, the potential of Silicon-Germanium (SiGe) technology for VLSI logic applications is i...
Here, we demonstrate a new process to fabricate tensily strained Si On Insulator substrates (sSOI). ...
In this paper, the potential of Silicon-Germanium (SiGe) technology for VLSI logic applications is i...
High mobility materials are being considered to replace Si in the channel to achieve higher drive cu...
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