The Embedded system design is characterized by its daily complexity. It integrates a hardware and software parts together on a common platform. These parts may be defective by a spurious signal, subsequently found to be two types of errors. The software and hardware errors can attack the embedded system. In this paper an exhaustive analysis of the effects of Single Event Upset into the Static Random Access Memory occupied area of Aeroflex Gaisler LEON3 processor is presented. It is a soft core pipeline processor that is part of the GRLIB IP library based on Scalable Processor Architecture, SPARC V8,implemented in Virtex-5 FPGA. A new software methodology allowing fault injection is explored and illustrated in order to classify the defecti...
Various formal approaches can be used to study FPGA-based systems in relationships to faults, in par...
Predicting soft errors on SRAM-based FPGAs without a wasteful time-consuming or a high-cost has alwa...
In this paper a simulator of soft errors (SEUs) in the configuration memory of SRAM-based FPGAs is p...
The Embedded system design is characterized by its daily complexity. It integrates a hardware and so...
ISBN 978-1-4673-2355-0International audienceAn approach to study the effects of soft errors by fault...
This paper presents a detailed analysis of the behavior of a novel fault-tolerant 32-bit embedded CP...
International audienceThis paper describes two different but complementary approaches that can be us...
The interest of the space industry around soft processors is increasing. However, the advantages in ...
In order to increase the robustness of a circuit against SEUs, fault injection is commonly used to l...
Modern SRAM-based Field Programmable Gate Ar- rays (FPGAs) are increasingly employed in safety- and ...
The development of process technology has increased system performance, but the system failure proba...
This paper presents an empirical investigation on the soft error sensitivity (SES) of microprocessor...
Predicting soft errors on SRAM-based FPGAs without a wasteful time-consuming or a high-cost has alwa...
In this paper a simulator of soft errors (SEUs) in the configuration memory of SRAM-based FPGAs is p...
textDependability and fault tolerance are important aspects of modern computer systems. Particle str...
Various formal approaches can be used to study FPGA-based systems in relationships to faults, in par...
Predicting soft errors on SRAM-based FPGAs without a wasteful time-consuming or a high-cost has alwa...
In this paper a simulator of soft errors (SEUs) in the configuration memory of SRAM-based FPGAs is p...
The Embedded system design is characterized by its daily complexity. It integrates a hardware and so...
ISBN 978-1-4673-2355-0International audienceAn approach to study the effects of soft errors by fault...
This paper presents a detailed analysis of the behavior of a novel fault-tolerant 32-bit embedded CP...
International audienceThis paper describes two different but complementary approaches that can be us...
The interest of the space industry around soft processors is increasing. However, the advantages in ...
In order to increase the robustness of a circuit against SEUs, fault injection is commonly used to l...
Modern SRAM-based Field Programmable Gate Ar- rays (FPGAs) are increasingly employed in safety- and ...
The development of process technology has increased system performance, but the system failure proba...
This paper presents an empirical investigation on the soft error sensitivity (SES) of microprocessor...
Predicting soft errors on SRAM-based FPGAs without a wasteful time-consuming or a high-cost has alwa...
In this paper a simulator of soft errors (SEUs) in the configuration memory of SRAM-based FPGAs is p...
textDependability and fault tolerance are important aspects of modern computer systems. Particle str...
Various formal approaches can be used to study FPGA-based systems in relationships to faults, in par...
Predicting soft errors on SRAM-based FPGAs without a wasteful time-consuming or a high-cost has alwa...
In this paper a simulator of soft errors (SEUs) in the configuration memory of SRAM-based FPGAs is p...