Fast Static Performance Analysis of Parallel Program Schemes

During the embedded system development an estimation of software performance on different hardware is needed. Estimation of the expected acceleration of program execution on various numbers of processors, estimation of computation space etc. Such estimations, as other aspects of performance analysis complex, should help with different problems that arise at the intersection of software and hardware parts. For example, selection of the most successful hardware platform from available options for current program solution or modernization of the program for better resource use of given hardware platform and achieve best performance. In the paper tool of static analysis is considered. It is a part of the complex of program performance analysis in integrated development environment VIPE for perspective multicore embedded systems